10μW/cm2-class high power density planar Si-nanowire thermoelectric energy harvester compatible with CMOS-VLSI technology

M. Tomita, S. Oba, Y. Himeda, R. Yamato, K. Shima, T. Kumada, M. Xu, H. Takezawa, K. Mesaki, K. Tsuda, S. Hashimoto, T. Zhan, H. Zhang, Y. Kamakura, Y. Suzuki, H. Inokawa, H. Ikeda, T. Matsukawa, T. Matsuki, T. Watanabe

研究成果: Conference contribution

2 被引用数 (Scopus)

抄録

A best benchmark of Si-nanowire (NW) thermoelectric (TE) power generator has been achieved by our proposed planar device architecture compatible with CMOS process technology. The TE power density corresponds to 12 μW/cm2, which is recorded at an externally applied temperature difference of only 5 K. The demonstration opens up a pathway to cost effective autonomous internet of things (IoT) application utilizing environmental and body heats.

本文言語English
ホスト出版物のタイトル2018 IEEE Symposium on VLSI Technology, VLSI Technology 2018
出版社Institute of Electrical and Electronics Engineers Inc.
ページ93-94
ページ数2
ISBN(電子版)9781538642160
DOI
出版ステータスPublished - 2018 10 25
イベント38th IEEE Symposium on VLSI Technology, VLSI Technology 2018 - Honolulu, United States
継続期間: 2018 6 182018 6 22

出版物シリーズ

名前Digest of Technical Papers - Symposium on VLSI Technology
2018-June
ISSN(印刷版)0743-1562

Other

Other38th IEEE Symposium on VLSI Technology, VLSI Technology 2018
CountryUnited States
CityHonolulu
Period18/6/1818/6/22

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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