1.2-V 101-GHz W-band power amplifier integrated in a 65-nm CMOS technology

Uroschanit Yodprasit, Kosuke Katayama, Ryuichi Fujimoto, Mizuki Motoyoshi, Minoru Fujishima

研究成果: Conference contribution

2 被引用数 (Scopus)

抄録

In this paper, design and characterization of a medium-power power amplifier targeted for short-range wireless communications in W-band frequency are presented. The power amplifier consists of six stages of common-source gain stages biased in class-A mode to maximize the power gain. The matching networks are based on slow-wave transmission lines in order to compact the layout. Fabricated in a 65-nm CMOS process, the power amplifier achieves a maximum power gain of 8.5 dB at 101 GHz and a 3-dB bandwidth of 18 GHz. The power amplifier delivers a saturation power of 7.1 dBm using a 1.2-V supply voltage and consumes 189 mW.

本文言語English
ホスト出版物のタイトル2013 IEEE International Semiconductor Conference Dresden - Grenoble
ホスト出版物のサブタイトルTechnology, Design, Packaging, Simulation and Test, ISCDG 2013
DOI
出版ステータスPublished - 2013
イベント2013 IEEE International Semiconductor Conference Dresden - Grenoble: Technology, Design, Packaging, Simulation and Test, ISCDG 2013 - Dresden, Germany
継続期間: 2013 9 262013 9 27

出版物シリーズ

名前2013 IEEE International Semiconductor Conference Dresden - Grenoble: Technology, Design, Packaging, Simulation and Test, ISCDG 2013

Other

Other2013 IEEE International Semiconductor Conference Dresden - Grenoble: Technology, Design, Packaging, Simulation and Test, ISCDG 2013
CountryGermany
CityDresden
Period13/9/2613/9/27

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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