18-GHz band low-power LC VCO IC using LC bias circuit in 56-nm SOI CMOS

Xiao Xu, Cuilin Chen, Tsuyoshi Sugiura, Toshihiko Yoshimasu

研究成果: Conference contribution

2 引用 (Scopus)

抜粋

This paper presents a novel 18-GHz band 0.5 V Class-C pMOSFET LC-VCO IC. The LC-VCO IC consists of an oscillator core circuit with a cross-coupled pMOSFETs and an LC bias circuit, an amplitude feedback circuit for realizing Class-C operation and buffer amplifiers. The VCO IC starts to oscillate in Class AB mode and enters Class C mode in the steady-state by changing the gate bias voltage. Since the LC bias circuit increases the current amplitude of the VCO and Class-C operation prevents the pMOSFETs from entering into the deep-triode region, the novel VCO circuit topology is effective in improving the phase noise. The low-power LC biased VCO IC is designed, fabricated and fully evaluated on-wafer in 56-nm SOI CMOS technology. The fabricated VCO IC has exhibited a measured phase noise of -117.6 dBc/Hz at 5 MHz offset from the 18.88 GHz carrier frequency with a supply voltage of only 0.5-V. The power consumption of VCO core is 2.56 mW and that of the feedback loop is only 0.046 mW.

元の言語English
ホスト出版物のタイトル2017 Asia Pacific Microwave Conference, APMC 2017 - Proceedings
出版者Institute of Electrical and Electronics Engineers Inc.
ページ938-941
ページ数4
Part F134147
ISBN(電子版)9781538606407
DOI
出版物ステータスPublished - 2018 1 8
イベント2017 IEEE Asia Pacific Microwave Conference, APMC 2017 - Kuala Lumpur, Malaysia
継続期間: 2017 11 132017 11 16

Other

Other2017 IEEE Asia Pacific Microwave Conference, APMC 2017
Malaysia
Kuala Lumpur
期間17/11/1317/11/16

    フィンガープリント

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

これを引用

Xu, X., Chen, C., Sugiura, T., & Yoshimasu, T. (2018). 18-GHz band low-power LC VCO IC using LC bias circuit in 56-nm SOI CMOS. : 2017 Asia Pacific Microwave Conference, APMC 2017 - Proceedings (巻 Part F134147, pp. 938-941). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/APMC.2017.8251604