2.37-dBm-output 288-310 GHz frequency multiplier in 40 nm CMOS

Kosuke Katayama, Kyoya Takano, Shuhei Amakawa, Takeshi Yoshida, Minoru Fujishima

研究成果: Conference contribution

4 被引用数 (Scopus)

抄録

We introduce a 288-310 GHz frequency multiplier fabricated with 40 nm CMOS technology. With 410.3 mW power consumption, this frequency multiplier has a conversion gain of 4.52 dB including that of its driver amplifier. The proposed system for input power/phase control of the power combiner enhances the output power of the frequency multiplier to 2.37 dBm at 300 GHz.

本文言語English
ホスト出版物のタイトル2017 IEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2017
出版社Institute of Electrical and Electronics Engineers Inc.
ページ28-30
ページ数3
ISBN(電子版)9781509040360
DOI
出版ステータスPublished - 2017 9 20
外部発表はい
イベント2017 IEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2017 - Seoul, Korea, Republic of
継続期間: 2017 8 302017 9 1

出版物シリーズ

名前2017 IEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2017

Other

Other2017 IEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2017
CountryKorea, Republic of
CitySeoul
Period17/8/3017/9/1

ASJC Scopus subject areas

  • Computer Networks and Communications
  • Electrical and Electronic Engineering
  • Instrumentation

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