2n RRR: Improved stochastic number duplicator based on bit re-arrangement

    研究成果: Conference contribution

    1 被引用数 (Scopus)


    In the fields of machine learning and image processing, cost-less circuits with low energy are required instead of extreme precision, and stochastic computing (SC), a type of approximate computing, is attracting attention. In SC, stochastic numbers (SNs), bit streams with values of the appearance rates of 1's, are used. SC enables calculations with simple circuits. To make the calculation results correct, duplication of an SN (gener-ating an SN with the same value) is required when using the SN with the same value. The conventional SN duplicator composed of a flip-flop (FF) has a problem that the output SN only depends on the input SN. Therefore, if the FF-based duplicator is used in a circuit with re-convergence paths, the output SN becomes erroneous. This paper proposes an SN duplicator, 2n RRR, that can output more independent output by its improved flexibility of bit re-arrangement. With this duplicator, the errors of the hyperbolic tangent function are reduced by up to 50% compared to the duplicator that we proposed previously. Also, up to more than 99.9% of the circuit area is reduced compared to the implementation of binary computing.

    ホスト出版物のタイトル2018 New Generation of CAS, NGCAS 2018
    出版社Institute of Electrical and Electronics Engineers Inc.
    出版ステータスPublished - 2018 12 10
    イベント2018 New Generation of CAS, NGCAS 2018 - Valletta, Malta
    継続期間: 2018 11 202018 11 23


    Other2018 New Generation of CAS, NGCAS 2018

    ASJC Scopus subject areas

    • Hardware and Architecture
    • Electrical and Electronic Engineering
    • Energy Engineering and Power Technology
    • Instrumentation

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