98 mW 10 Gbps wireless transceiver chipset with d-band COMS circuits

Minoru Fujishima, Mizuki Motoyoshi, Kosuke Katayama, Kyoya Takano, Naoko Ono, Ryuichi Fujimoto

研究成果: Article

56 引用 (Scopus)

抜粋

Recently, short-distance high-speed wireless communication using a 60 GHz band has been studied for mobile application. To realize higher-speed wireless communication while maintaining low power consumption for mobile application D band (110-170 GHz) is promising since it can potentially provide a wider frequency band. Thus, we have studied D-band CMOS circuits to realize low-power ultrahigh-speed wireless communication. In the D band, however, since no sufficient device model is provided, research generally has to start from device modeling. In this paper, a design procedure for D-band CMOS circuits is overviewed from the device layer to the system layer, where the architecture is optimized to realize both low power and high data transfer rate. Finally, a 10 Gbps wireless transceiver with a power consumption of 98 mW is demonstrated using the 135 GHz band.

元の言語English
記事番号6517512
ページ(範囲)2273-2284
ページ数12
ジャーナルIEEE Journal of Solid-State Circuits
48
発行部数10
DOI
出版物ステータスPublished - 2013

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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  • これを引用

    Fujishima, M., Motoyoshi, M., Katayama, K., Takano, K., Ono, N., & Fujimoto, R. (2013). 98 mW 10 Gbps wireless transceiver chipset with d-band COMS circuits. IEEE Journal of Solid-State Circuits, 48(10), 2273-2284. [6517512]. https://doi.org/10.1109/JSSC.2013.2261192