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• Article

  A 2.5-Ghz 1-V high efficiency CMOS power amplifier IC with a dual-switching transistor and third harmonic tuning technique

  Kurniawan, T. A. & Yoshimasu, T., 2019 1月 1, In: Electronics (Switzerland). 8, 1, 69.

  研究成果: Article › 査読
  4 被引用数 (Scopus)

• A 200-m All-out Front-crawl Swim Modifies Competitive Swimmers' Shoulder Joint Position Sense

  Uematsu, A., Kurita, Y., Inoue, K., Okuno, K., Hortobágyi, T. & Suzuki, S., 2015 8月 7, In: International journal of sports medicine. 36, 13, p. 1081-1086 6 p.

  研究成果: Article › 査読
  2 被引用数 (Scopus)

• A 20-year retrospective study of the impact of expeditions on Japanese participants

  Takano, T., 2010 12月 1, In: Journal of Adventure Education and Outdoor Learning. 10, 2, p. 77-94 18 p.

  研究成果: Article › 査読
  17 被引用数 (Scopus)

• A 210-kb segment of tandem repeats and retroelements located between imprinted subdomains of mouse distal chromosome 7

  Shirohzu, H., Yokomine, T., Sato, C., Kato, R., Toyoda, A., Purbowasito, W., Suda, C., Mukai, T., Hattori, M., Okumura, K., Sakaki, Y. & Sasaki, H., 2004, In: DNA Research. 11, 5, p. 325-334 10 p.

  研究成果: Article › 査読
  14 被引用数 (Scopus)

• A 24-b 50-ns Digital Image Signal Processor

  Nakagawa, S. I., Matsumura, T., Segawa, H., Yoshimoto, M., Shinohara, H., Kato, S. I., Hatanaka, M. & Horiba, Y., 1990 12月, In: IEEE Journal of Solid-State Circuits. 25, 6, p. 1484-1493 10 p.

  研究成果: Article › 査読
  12 被引用数 (Scopus)

• A 250 mV bit-line swing scheme for 1-v operating gigabit scale drams

  Inaba, T., Takashima, D., Oowaki, Y., Ozaklt, T., Watanabe, S., Ohsawa, T., Ohuchi, K. & Tango, H., 1996 1月 1, In: IEICE Transactions on Electronics. E79-C, 12, p. 1699-1705 7 p.

  研究成果: Article › 査読

• A 26-GHz-band high back-off efficiency stacked-FET power amplifier IC with adaptively controlled bias and load circuits in 45-nm CMOS SOI

  Yoshimasu, T., Fang, M. & Sugiura, T., 2021 2月 1, In: IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences. E104A, 2, p. 477-483 7 p.

  研究成果: Article › 査読

• A 28-GHz-band highly linear stacked-FET power amplifier IC with high back-off PAE in 56-nm SOI CMOS

  Chen, C., Sugiura, T. & Yoshimasu, T., 2020, In: IEICE Transactions on Electronics. E103.C, 4, p. 153-160 8 p.

  研究成果: Article › 査読
  5 被引用数 (Scopus)

• A 2-MB sequence-ready contig map and a novel immunoglobulin superfamily gene IGSF4 in the LOH region of chromosome 11q23.2

  Gomyo, H., Arai, Y., Tanigami, A., Murakami, Y., Hattori, M., Hosoda, F., Arai, K., Aikawa, Y., Tsuda, H., Hirohashi, S., Asakawa, S., Shimizu, N., Soeda, E., Sakaki, Y. & Ohki, M., 1999 12月 1, In: Genomics. 62, 2, p. 139-146 8 p.

  研究成果: Article › 査読
  103 被引用数 (Scopus)

• A 3.5 ppm/°C 0.85V bandgap reference circuit without resistors

  Wang, J., Li, Q., Ding, L., Shinohara, H. & Inoue, Y., 2016 7月 1, In: IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences. E99A, 7, p. 1430-1437 8 p.

  研究成果: Article › 査読
  1 被引用数 (Scopus)

• A 3.6-Gb/s 340-mW 16: 1 pipe-lined multiplexer using 0.18 μm SOI-CMOS technology

  Nakura, T., Ueda, K., Kubo, K., Matsuda, Y., Mashiko, K. & Yoshihara, T., 2000, In: IEEE Journal of Solid-State Circuits. 35, 5, p. 751-756 6 p.

  研究成果: Article › 査読
  10 被引用数 (Scopus)

• A '3+1' method for finding principal null directions

  Gunnarsen, L., Shinkai, H. A. & Maeda, K. I., 1995, In: Classical and Quantum Gravity. 12, 1, p. 133-140 8 p., 011.

  研究成果: Article › 査読
  20 被引用数 (Scopus)

• A 300 GHz CMOS Transmitter with 32-QAM 17.5 Gb/s/ch Capability over Six Channels

  Katayama, K., Takano, K., Amakawa, S., Hara, S., Kasamatsu, A., Mizuno, K., Takahashi, K., Yoshida, T. & Fujishima, M., 2016 12月, In: IEEE Journal of Solid-State Circuits. 51, 12, p. 3037-3048 12 p., 7565498.

  研究成果: Article › 査読
  75 被引用数 (Scopus)

• A 300mV sub-threshold region 2.4GHz voltage-controlled oscillator and frequency divider with transformer technique for ultralow power RF applications

  Miyahara, Y., Ishikawa, K. & Kuroda, T., 2014 4月, In: Japanese journal of applied physics. 53, 4 SPEC. ISSUE, 04EE01.

  研究成果: Article › 査読
  1 被引用数 (Scopus)

• A 300-year Vietnam hydroclimate and ENSO variability record reconstructed from tree ring δ¹⁸O

  Sano, M., Xu, C. & Nakatsuka, T., 2012, In: Journal of Geophysical Research Atmospheres. 117, 12, D12115.

  研究成果: Article › 査読
  80 被引用数 (Scopus)

• A 312-MHz 16-Mb random-cycle embedded DRAM macro with a power-down data retention mode for mobile applications

  Morishita, F., Hayashi, I., Matsuoka, H., Takahashi, K., Shigeta, K., Gyohten, T., Niiro, M., Noda, H., Okamoto, M., Hachisuka, A., Amo, A., Shinkawata, H., Kasaoka, T., Dosaka, K., Arimoto, K., Fujishima, K., Anami, K. & Yoshihara, T., 2005 1月, In: IEEE Journal of Solid-State Circuits. 40, 1, p. 204-210 7 p.

  研究成果: Article › 査読
  14 被引用数 (Scopus)

• A 338-year tree-ring oxygen isotope record from Thai teak captures the variations in the Asian summer monsoon system

  Pumijumnong, N., Bräuning, A., Sano, M., Nakatsuka, T., Muangsong, C. & Buajan, S., 2020 12月 1, In: Scientific reports. 10, 1, 8966.

  研究成果: Article › 査読

  Open Access
  15 被引用数 (Scopus)

• A 34-ns 1-Mbit CMOS SRAM Using Triple Polysilicon

  Wada, T., Hirose, T., Shinohara, H., Kawai, Y., Yuzuriha, K., Kohno, Y. & Kayano, S., 1987 10月, In: IEEE Journal of Solid-State Circuits. 22, 5, p. 727-732 6 p.

  研究成果: Article › 査読
  12 被引用数 (Scopus)

• A 35 ns 16K NMOS Static RAM

  Anami, K., Yoshimoto, M., Shinohara, H., Hirata, Y., Harada, H. & Nakano, T., 1982 10月, In: IEEE Journal of Solid-State Circuits. 17, 5, p. 815-820 6 p.

  研究成果: Article › 査読
  1 被引用数 (Scopus)

• A 373-F 0.21%-Native-BER EE SRAM Physically Unclonable Function with 2-D Power-Gated Bit Cells and {V}_{\text{SS}} Bias-Based Dark-Bit Detection

  Liu, K., Min, Y., Yang, X., Sun, H. & Shinohara, H., 2020 6月, In: IEEE Journal of Solid-State Circuits. 55, 6, p. 1719-1732 14 p., 8957039.

  研究成果: Article › 査読
  13 被引用数 (Scopus)

• A 38-ns 4-Mb DRAM with a battery-backup (BBU) mode

  Konishi, Y., Dosaka, K., Komatsu, T., Inoue, Y., Kumanoya, M., Tobita, Y., Genjyo, H., Nagatomo, M. & Yoshihara, T., 1990 10月, In: IEEE Journal of Solid-State Circuits. 25, 5, p. 1112-1117 6 p.

  研究成果: Article › 査読
  6 被引用数 (Scopus)

• A3COSMOS: The dust attenuation of star-forming galaxies at z = 2.5-4.0 from the COSMOS-ALMA archive

  Fudamoto, Y., Oesch, P. A., Magnelli, B., Schinnerer, E., Liu, D., Lang, P., Jiménez-Andrade, E. F., Groves, B., Leslie, S. & Sargent, M. T., 2020 2月 1, In: Monthly Notices of the Royal Astronomical Society. 491, 4, p. 4724-4734 11 p.

  研究成果: Article › 査読
  16 被引用数 (Scopus)

• A 3D ground penetrating radar imaging of the heavy rainfall-induced deformation around a river levee: A case study of Ara River, Saitama, Japan

  Yokota, T., Inazaki, T., Shinagawa, S. & Ueda, T., 2009 7月 6, In: Exploration Geophysics. 40, 1, p. 49-55 7 p.

  研究成果: Article › 査読
  1 被引用数 (Scopus)

• A 3D head pointer: A manipulation method that enables the spatial position and posture of supernumerary robotic limbs

  Oh, J., Kato, F., Iwasaki, Y. & Iwata, H., 2021, In: Acta IMEKO. 10, 3, p. 81-90 10 p.

  研究成果: Article › 査読

  Open Access

• A 3-dimensional mathematical model of microbial proliferation that generates the characteristic cumulative relative abundance distributions in gut microbiomes

  Takayasu, L., Suda, W., Watanabe, E., Fukuda, S., Takanashi, K., Ohno, H., Takayasu, M., Takayasu, H. & Hattori, M., 2017 8月 1, In: PLoS One. 12, 8, e0180863.

  研究成果: Article › 査読
  4 被引用数 (Scopus)

• A 3D object model for wireless camera networks with network constraints

  Liu, L., Iwata, H., Tan, J., Kong, F. & Liang, W., 2013 10月, In: Transactions of the Institute of Measurement and Control. 35, 7, p. 866-874 9 p.

  研究成果: Article › 査読
  3 被引用数 (Scopus)

• A 3 Jy radio burst at a high galactic latitude

  Niinuma, K., Asuma, K., Kuniyoshi, M., Matsumura, N., Takefuji, K., Kida, S., Takeuchi, A., Nakamura, R., Tanaka, T., Suzuki, S. & Daishido, T., 2007 3月 1, In: Astrophysical Journal. 657, 1 II

  研究成果: Article › 査読
  29 被引用数 (Scopus)

• A 400-mV 2.4-GHz frequency-shift keying transmitter using a capacitor switch across a transformer for a wide tuning range voltage-controlled oscillator

  Miyahara, Y., Ishikawa, K. & Kuroda, T., 2017 4月, In: Japanese journal of applied physics. 56, 4, 04CF04.

  研究成果: Article › 査読
  1 被引用数 (Scopus)

• A 400-year record of hydroclimate variability and local ENSO history in northern Southeast Asia inferred from tree-ring δ¹⁸O

  Xu, C., Sano, M. & Nakatsuka, T., 2013 9月 5, In: Palaeogeography, Palaeoclimatology, Palaeoecology. 386, p. 588-598 11 p.

  研究成果: Article › 査読
  54 被引用数 (Scopus)

• A 41 mW VGA@30 fps quadtree video encoder for video surveillance systems

  Liu, Q., Hiratsuka, S., Shimizu, K., Ushiki, S., Goto, S. & Ikenaga, T., 2008 4月, In: IEICE Transactions on Electronics. E91-C, 4, p. 449-456 8 p.

  研究成果: Article › 査読
  1 被引用数 (Scopus)

• A 45 nm 2-port 8T-SRAM using hierarchical replica bitline technique with immunity from simultaneous R/W access issues

  Ishikura, S., Kurumada, M., Terano, T., Yamagami, Y., Kotani, N., Satomi, K., Nii, K., Yabuuchi, M., Tsukamoto, Y., Ohbayashi, S., Oashi, T., Makino, H., Shinohara, H. & Akamatsu, H., 2008 1月, In: IEEE Journal of Solid-State Circuits. 43, 4, p. 938-943 6 p.

  研究成果: Article › 査読
  30 被引用数 (Scopus)

• A 45-nm 37.3 GOPS/W heterogeneous multi-core SOC with 16/32 bit instruction-set general-purpose core

  Nishii, O., Yuyama, Y., Ito, M., Kiyoshige, Y., Nitta, Y., Ishikawa, M., Yamada, T., Miyakoshi, J., Wada, Y., Kimura, K., Kasahara, H. & Maejima, H., 2011 4月, In: IEICE Transactions on Electronics. E94-C, 4, p. 663-669 7 p.

  研究成果: Article › 査読

• A 45-nm Bulk CMOS Embedded SRAM With Improved Immunity Against Process and Temperature Variations

  Nii, K., Yabuuchi, M., Tsukamoto, Y., Ohbayashi, S., Imaoka, S., Makino, H., Yamagami, Y., Ishikura, S., Terano, T., Oashi, T., Hashimoto, K., Sebe, A., Okazaki, G., Satomi, K., Akamatsu, H. & Shinohara, H., 2008 1月, In: IEEE Journal of Solid-State Circuits. 43, 1, p. 180-191 12 p.

  研究成果: Article › 査読
  50 被引用数 (Scopus)

• A 45-ns 256K CMOS Static RAM with a Tri-Level Word Line

  Shinohara, H., Anami, K., Ichinose, K., Wada, T., Kohno, Y., Kawai, Y., Akasaka, Y. & Kayano, S., 1985 10月, In: IEEE Journal of Solid-State Circuits. 20, 5, p. 929-934 6 p.

  研究成果: Article › 査読
  2 被引用数 (Scopus)

• A 45-ns 64-Mb DRAM with a merged match-line test architecture

  Mori, S., Miyamoto, H., Morooka, Y., Kikuda, S., Suwa, M., Kinoshita, M., Hachisuka, A., Arima, H., Yamada, M., Yoshihara, T. & Kayano, S., 1991 11月, In: IEEE Journal of Solid-State Circuits. 26, 11, p. 1486-1492 7 p.

  研究成果: Article › 査読
  9 被引用数 (Scopus)

• A 48 cycles/MB H.264/AVC deblocking filter architecture for ultra high definition applications

  Zhou, D., Zhou, J., Zhu, J. & Goto, S., 2009 12月, In: IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences. E92-A, 12, p. 3203-3210 8 p.

  研究成果: Article › 査読
  15 被引用数 (Scopus)

• A 5.5-GHZ sige HBT Doherty amplifier using diode linearizer and lumped-element hybrid coupler

  Liu, H. & Yoshimasu, T., 2008 6月 1, In: Microwave and Optical Technology Letters. 50, 6, p. 1554-1558 5 p.

  研究成果: Article › 査読
  3 被引用数 (Scopus)

• A 5.83 pj/bit/iteration High-Parallel Performance-Aware LDPC Decoder IP Core Design for WiMAX in 65 nm CMOS

  Zhao, X., Chen, Z., Peng, X., Zhou, D. & Goto, S., 2013, In: IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences. E96-A, 12, p. 2623-2632 10 p.

  研究成果: Article › 査読

• A 530 Mpixels/s 4096×2160@60fps H.264/AVC high profile video decoder chip

  Zhou, D., Zhou, J., He, X., Zhu, J., Kong, J., Liu, P. & Goto, S., 2011 4月, In: IEEE Journal of Solid-State Circuits. 46, 4, p. 777-788 12 p., 5727920.

  研究成果: Article › 査読
  50 被引用数 (Scopus)

• A 530 Mpixels/s intra prediction architecture for ultra high definition H.264/AVC encoder

  He, G., Zhou, D., Zhou, J., Zhang, T. & Goto, S., 2011 4月, In: IEICE Transactions on Electronics. E94-C, 4, p. 419-427 9 p.

  研究成果: Article › 査読
  1 被引用数 (Scopus)

• A 5-GHz band WLAN SiGe HBT power amplifier IC with novel adaptive-linearizing CMOS bias circuit

  Yang, X., Sugiura, T., Otani, N., Murakami, T., Otobe, E. & Yoshimasu, T., 2015 7月 1, In: IEICE Transactions on Electronics. E98C, 7, p. 651-658 8 p.

  研究成果: Article › 査読
  2 被引用数 (Scopus)

• A 6.72-Gb/s 8pJ/bit/iteration IEEE 802.15.3c LDPC decoder chip

  Chen, Z., Peng, X., Zhao, X., Okamura, L., Zhou, D. & Goto, S., 2011 12月, In: IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences. E94-A, 12, p. 2587-2596 10 p.

  研究成果: Article › 査読
  1 被引用数 (Scopus)

• A 600-MHz 54 × 54-bit multiplier with rectangular-styled Wallace tree

  Itoh, N., Naemura, Y., Makino, H., Nakase, Y., Yoshihara, T. & Horiba, Y., 2001 2月, In: IEEE Journal of Solid-State Circuits. 36, 2, p. 249-257 9 p.

  研究成果: Article › 査読
  49 被引用数 (Scopus)

• A 60-GHz compact mobile terminal for full-duplex radio-on-fiber system

  Yang, K. S., Choi, S. T., Kim, Y. H., Nishi, S., Shimizu, S. & Tokuda, K., 2005 3月 20, In: Microwave and Optical Technology Letters. 44, 6, p. 504-507 4 p.

  研究成果: Article › 査読
  3 被引用数 (Scopus)

• A 60-GHz point-to-multipoint millimeter-wave fiber-radio communication system

  Choi, S. T., Yang, K. S., Nishi, S., Shimizu, S., Tokuda, K. & Kim, Y. H., 2006 5月, In: IEEE Transactions on Microwave Theory and Techniques. 54, 5, p. 1953-1960 8 p.

  研究成果: Article › 査読
  37 被引用数 (Scopus)

• A 60-ns 16-Mb flash EEPROM with program and erase sequence controller

  Nakayama, T., Kobayashi, S. I., Miyawaki, Y., Terada, Y., Ajika, N., Ohi, M., Arima, H., Matsukawa, T., Yoshihara, T. & Suzuki, K., 1991 11月, In: IEEE Journal of Solid-State Circuits. 26, 11, p. 1600-1605 6 p.

  研究成果: Article › 査読
  2 被引用数 (Scopus)

• A 60-ns 4-Mbit CMOS DRAM with Built-In Self-Test Function

  Ohsawa, T., Furuyama, T., Watanabe, Y., Tanaka, H., Natori, K., Shinozaki, S., Tanaka, T., Yamano, S., Nagahama, Y., Kushiyama, N. & Tsuchida, K., 1987 10月, In: IEEE Journal of Solid-State Circuits. 22, 5, p. 663-668 6 p.

  研究成果: Article › 査読
  16 被引用数 (Scopus)

• A 64-bit carry look ahead adder using pass transistor BiCMOS gates

  Ueda, K., Suzuki, H., Suda, K., Shinohara, H. & Mashiko, K., 1996 6月, In: IEEE Journal of Solid-State Circuits. 31, 6, p. 810-817 8 p.

  研究成果: Article › 査読
  10 被引用数 (Scopus)

• A 65 nm Embedded SRAM With Wafer Level Burn-In Mode, Leak-Bit Redundancy and Cu E-Trim Fuse for Known Good Die

  Ohbayashi, S., Yabuuchi, M., Kono, K., Oda, Y., Imaoka, S., Usui, K., Yonezu, T., Iwamoto, T., Nii, K., Tsukamoto, Y., Arakawa, M., Uchida, T., Okada, M., Ishii, A., Yoshihara, T., Makino, H., Ishibashi, K. & Shinohara, H., 2008 1月, In: IEEE Journal of Solid-State Circuits. 43, 1, p. 96-108 13 p.

  研究成果: Article › 査読
  11 被引用数 (Scopus)

• A 65-nm SoC embedded 6T-SRAM designed for manufacturability with read and write operation stabilizing circuits

  Ohbayashi, S., Yabuuchi, M., Nil, K., Tsukamoto, Y., Imaoka, S., Oda, Y., Yoshihara, T., Igarashi, M., Takeuchi, M., Kawashima, H., Yamaguchi, Y., Tsukamoto, K., Inuishi, M., Makino, H., Ishibashi, K. & Shinohara, H., 2007 4月, In: IEEE Journal of Solid-State Circuits. 42, 4, p. 820-829 10 p.

  研究成果: Article › 査読
  96 被引用数 (Scopus)