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• A 3D guitar fingering assessing system based on CNN-Hand pose estimation and SVR-Assessment

  Wang, Z. & Ohya, J., 2018 1 1, In: IS and T International Symposium on Electronic Imaging Science and Technology. Part F138660, p. 2781-2785 5 p.

  研究成果: Conference article › 査読

• A 3-dimensional mathematical model of microbial proliferation that generates the characteristic cumulative relative abundance distributions in gut microbiomes

  Takayasu, L., Suda, W., Watanabe, E., Fukuda, S., Takanashi, K., Ohno, H., Takayasu, M., Takayasu, H. & Hattori, M., 2017 8 1, In: PLoS One. 12, 8, e0180863.

  研究成果: Article › 査読
  4 被引用数 (Scopus)

• A 3D object model for wireless camera networks with network constraints

  Liu, L., Iwata, H., Tan, J., Kong, F. & Liang, W., 2013 10, In: Transactions of the Institute of Measurement and Control. 35, 7, p. 866-874 9 p.

  研究成果: Article › 査読
  3 被引用数 (Scopus)

• A 3D sensing model and practical sensor placement based on coverage and cost evaluation

  Yang, J., Kamezaki, M., Iwata, H. & Sugano, S., 2015 10 2, 2015 IEEE International Conference on Cyber Technology in Automation, Control and Intelligent Systems, IEEE-CYBER 2015. Institute of Electrical and Electronics Engineers Inc., p. 1-6 6 p. 7287900

  研究成果: Conference contribution
  3 被引用数 (Scopus)

• A 3-D vision system incorporating solid modeler and geometric reasoning

  Dohi, H. & Ishizuka, M., 1990, Proceedings - International Conference on Pattern Recognition. Piscataway, NJ, United States: Publ by IEEE, Vol. 1. p. 185-187 3 p.

  研究成果: Conference contribution
  1 被引用数 (Scopus)

• A 3 Jy radio burst at a high galactic latitude

  Niinuma, K., Asuma, K., Kuniyoshi, M., Matsumura, N., Takefuji, K., Kida, S., Takeuchi, A., Nakamura, R., Tanaka, T., Suzuki, S. & Daishido, T., 2007 3 1, In: Astrophysical Journal. 657, 1 II

  研究成果: Article › 査読
  28 被引用数 (Scopus)

• A 3V operation RF MEMS variable capacitor using piezoelectric and electrostatic actuation with lithographical bending control

  Ikehashi, T., Ogawa, E., Yamazaki, H. & Ohguro, T., 2007 12 1, TRANSDUCERS and EUROSENSORS '07 - 4th International Conference on Solid-State Sensors, Actuators and Microsystems. p. 149-152 4 p. 4300093. (TRANSDUCERS and EUROSENSORS '07 - 4th International Conference on Solid-State Sensors, Actuators and Microsystems).

  研究成果: Conference contribution
  1 被引用数 (Scopus)

• A 400-mV 2.4-GHz frequency-shift keying transmitter using a capacitor switch across a transformer for a wide tuning range voltage-controlled oscillator

  Miyahara, Y., Ishikawa, K. & Kuroda, T., 2017 4, In: Japanese journal of applied physics. 56, 4, 04CF04.

  研究成果: Article › 査読
  1 被引用数 (Scopus)

• A 400-year record of hydroclimate variability and local ENSO history in northern Southeast Asia inferred from tree-ring δ¹⁸O

  Xu, C., Sano, M. & Nakatsuka, T., 2013 9 5, In: Palaeogeography, Palaeoclimatology, Palaeoecology. 386, p. 588-598 11 p.

  研究成果: Article › 査読
  53 被引用数 (Scopus)

• A 40 dB peak gain, wideband, low noise intermediate frequency (IF) amplifier

  Dong, R., Hara, S., Katayama, K., Takano, K., Watanabe, I., Sekine, N., Kasamatsu, A., Yoshida, T., Amakawa, S. & Fujishima, M., 2017 6 28, 2017 Asia Pacific Microwave Conference, APMC 2017 - Proceedings. Pasya, I. (ed.). Institute of Electrical and Electronics Engineers Inc., p. 622-625 4 p. (Asia-Pacific Microwave Conference Proceedings, APMC).

  研究成果: Conference contribution

• A 40 degree grid model for multiple 3D objects

  Yaku, T., Anzai, K., Miyadera, Y., Anada, K., Goto, T. & Yokota, K., 2016 5 19, Proceedings - 2016 IEEE International Conference on Industrial Technology, ICIT 2016. Institute of Electrical and Electronics Engineers Inc., Vol. 2016-May. p. 1678-1683 6 p. 7475015

  研究成果: Conference contribution

• A 40-Gbit/s 16-bit photonic parallel-to-serial converter

  Takenouchi, H., Takahata, K., Nakahara, T., Takahashi, R. & Suzuki, H., 2002, In: Conference Proceedings - Lasers and Electro-Optics Society Annual Meeting-LEOS. 1, p. 45-46 2 p.

  研究成果: Conference article › 査読
  6 被引用数 (Scopus)

• A 40-nm 8T SRAM with selective source line control of read bitlines and address preset structure

  Yoshimoto, S., Miyano, S., Takamiya, M., Shinohara, H., Kawaguchi, H. & Yoshimoto, M., 2013 11 7, Proceedings of the IEEE 2013 Custom Integrated Circuits Conference, CICC 2013. Institute of Electrical and Electronics Engineers Inc., 6658537. (Proceedings of the Custom Integrated Circuits Conference).

  研究成果: Conference contribution
  2 被引用数 (Scopus)

• A 416-mW 32-Gbit/s 300-GHz CMOS receiver

  Hara, S., Katayama, K., Takano, K., Dong, R., Watanabe, I., Sekine, N., Kasamatsu, A., Yoshida, T., Amakawa, S. & Fujishima, M., 2017 9 20, 2017 IEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2017. Institute of Electrical and Electronics Engineers Inc., p. 65-67 3 p. 8048291. (2017 IEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2017).

  研究成果: Conference contribution
  7 被引用数 (Scopus)

• A 41mW VGA@30fps quadtree video encoder for video surveillance systems

  Liu, Q., Hiratsuka, S., Goto, S. & Ikenaga, T., 2007 12 1, ASICON 2007 - 2007 7th International Conference on ASIC Proceeding. p. 758-761 4 p. 4415741. (ASICON 2007 - 2007 7th International Conference on ASIC Proceeding).

  研究成果: Conference contribution

• A 41 mW VGA@30 fps quadtree video encoder for video surveillance systems

  Liu, Q., Hiratsuka, S., Shimizu, K., Ushiki, S., Goto, S. & Ikenaga, T., 2008 4, In: IEICE Transactions on Electronics. E91-C, 4, p. 449-456 8 p.

  研究成果: Article › 査読
  1 被引用数 (Scopus)

• A 4320MIPS four-processor core SMP/AMP with individually managed clock frequency for low power consumption

  Yoshida, Y., Kamei, T., Hayase, K., Shibahara, S., Nishii, O., Hattori, T., Hasegawa, A., Takada, M., Irie, N., Uchiyama, K., Odaka, T., Takada, K., Kimura, K. & Kasahara, H., 2007 9 27, 2007 IEEE International Solid-State Circuits Conference, ISSCC - Digest of Technical Papers. p. 100-101+590+95 4242284. (Digest of Technical Papers - IEEE International Solid-State Circuits Conference).

  研究成果: Conference contribution
  24 被引用数 (Scopus)

• A 4320p 60fps H.264/AVC intra-frame encoder chip with 1.41Gbins/s CABAC

  Zhou, D., He, G., Fei, W., Chen, Z., Zhou, J. & Goto, S., 2012, IEEE Symposium on VLSI Circuits, Digest of Technical Papers. p. 154-155 2 p. 6243836

  研究成果: Conference contribution
  7 被引用数 (Scopus)

• A 45nm 0.6V cross-point 8T SRAM with negative biased read/write assist

  Yabuuchi, M., Nii, K., Tsukamoto, Y., Ohbayashi, S., Nakase, Y. & Shinohara, H., 2009 11 18, 2009 Symposium on VLSI Circuits. p. 158-159 2 p. 5205389. (IEEE Symposium on VLSI Circuits, Digest of Technical Papers).

  研究成果: Conference contribution
  66 被引用数 (Scopus)

• A 45 nm 2-port 8T-SRAM using hierarchical replica bitline technique with immunity from simultaneous R/W access issues

  Ishikura, S., Kurumada, M., Terano, T., Yamagami, Y., Kotani, N., Satomi, K., Nii, K., Yabuuchi, M., Tsukamoto, Y., Ohbayashi, S., Oashi, T., Makino, H., Shinohara, H. & Akamatsu, H., 2008 1 1, In: IEEE Journal of Solid-State Circuits. 43, 4, p. 938-943 6 p.

  研究成果: Article › 査読
  29 被引用数 (Scopus)

• A 45nm 2port 8T-SRAM using hierarchical replica bitline technique with immunity from simultaneous RAV access issues

  Ishikura, S., Kurumada, M., Terano, T., Yamagami, Y., Kotani, N., Satomi, K., Nii, K., Yabuuchi, M., Tsukamoto, Y., Ohbayashi, S., Oashi, T., Makino, H., Shinohara, H. & Akamatsu, H., 2007 12 1, 2007 Symposium on VLSI Circuits, VLSIC - Digest of Technical Papers. p. 254-255 2 p. 4342740. (IEEE Symposium on VLSI Circuits, Digest of Technical Papers).

  研究成果: Conference contribution
  12 被引用数 (Scopus)

• A 45nm 37.3GOPS/W heterogeneous multi-core SoC

  Yuyama, Y., Ito, M., Kiyoshige, Y., Nitta, Y., Matsui, S., Nishii, O., Hasegawa, A., Ishikawa, M., Yamada, T., Miyakoshi, J., Terada, K., Nojiri, T., Satoh, M., Mizuno, H., Uchiyama, K., Wada, Y., Kimura, K., Kasahara, H. & Maejima, H., 2010 5 18, 2010 IEEE International Solid-State Circuits Conference, ISSCC 2010 - Digest of Technical Papers. p. 100-101 2 p. 5434031. (Digest of Technical Papers - IEEE International Solid-State Circuits Conference; vol. 53).

  研究成果: Conference contribution
  29 被引用数 (Scopus)

• A 45-nm 37.3 GOPS/W heterogeneous multi-core SOC with 16/32 bit instruction-set general-purpose core

  Nishii, O., Yuyama, Y., Ito, M., Kiyoshige, Y., Nitta, Y., Ishikawa, M., Yamada, T., Miyakoshi, J., Wada, Y., Kimura, K., Kasahara, H. & Maejima, H., 2011 4, In: IEICE Transactions on Electronics. E94-C, 4, p. 663-669 7 p.

  研究成果: Article › 査読

• A 45-nm Bulk CMOS Embedded SRAM With Improved Immunity Against Process and Temperature Variations

  Nii, K., Yabuuchi, M., Tsukamoto, Y., Ohbayashi, S., Imaoka, S., Makino, H., Yamagami, Y., Ishikura, S., Terano, T., Oashi, T., Hashimoto, K., Sebe, A., Okazaki, G., Satomi, K., Akamatsu, H. & Shinohara, H., 2008, In: IEEE Journal of Solid-State Circuits. 43, 1, p. 180-191 12 p.

  研究成果: Article › 査読
  50 被引用数 (Scopus)

• A 45nm low-standby-power embedded SRAM with improved immunity against process and temperature variations

  Yabuuchi, M., Nii, K., Tsukamoto, Y., Ohbayashi, S., Imaoka, S., Makino, H., Yamagami, Y., Ishikura, S., Terano, T., Oashi, T., Hashimoto, K., Sebe, A., Okazaki, G., Satomi, K., Akamatsu, H. & Shinohara, H., 2007 9 27, 2007 IEEE International Solid-State Circuits Conference, ISSCC - Digest of Technical Papers. p. 326-327+606+321 4242397. (Digest of Technical Papers - IEEE International Solid-State Circuits Conference).

  研究成果: Conference contribution
  50 被引用数 (Scopus)

• A 45-nm single-port and dual-port SRAM family with robust read/write stabilizing circuitry under DVFS environment

  Nii, K., Yabuuchi, M., Tsukamoto, Y., Ohbayashi, S., Oda, Y., Usui, K., Kawamura, T., Tsuboi, N., Iwasaki, T., Hashimoto, K., Makino, H. & Shinohara, H., 2008, 2008 Symposium on VLSI Circuits Digest of Technical Papers, VLSIC. Institute of Electrical and Electronics Engineers Inc., p. 212-213 2 p. 4586011. (IEEE Symposium on VLSI Circuits, Digest of Technical Papers).

  研究成果: Conference contribution
  92 被引用数 (Scopus)

• A 45-ns 256K CMOS Static RAM with a Tri-Level Word Line

  Shinohara, H., Anami, K., Ichinose, K., Wada, T., Kohno, Y., Kawai, Y., Akasaka, Y. & Kayano, S., 1985 10, In: IEEE Journal of Solid-State Circuits. 20, 5, p. 929-934 6 p.

  研究成果: Article › 査読
  2 被引用数 (Scopus)

• A 45-ns 64-Mb DRAM with a merged match-line test architecture

  Mori, S., Miyamoto, H., Morooka, Y., Kikuda, S., Suwa, M., Kinoshita, M., Hachisuka, A., Arima, H., Yamada, M., Yoshihara, T. & Kayano, S., 1991 11, In: IEEE Journal of Solid-State Circuits. 26, 11, p. 1486-1492 7 p.

  研究成果: Article › 査読
  9 被引用数 (Scopus)

• A 48 cycles/MB H.264/AVC deblocking filter architecture for ultra high definition applications

  Zhou, D., Zhou, J., Zhu, J. & Goto, S., 2009 12, In: IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences. E92-A, 12, p. 3203-3210 8 p.

  研究成果: Article › 査読
  15 被引用数 (Scopus)

• A 4-GHz band ultra-wideband voltage controlled oscillator IC using 0.35 μm SiGe BiCMOS technology

  Kurachi, S., Murata, Y., Ishikawa, S., Itoh, N., Yonemura, K. & Yoshimasu, T., 2007 12 1, Proceedings of the 2007 IEEE Bipolar/BiCMOS Circuits and Technology Meeting. p. 9-12 4 p. 4351827. (Proceedings of the IEEE Bipolar/BiCMOS Circuits and Technology Meeting).

  研究成果: Conference contribution
  3 被引用数 (Scopus)

• A 4Gpixel/s 8/10b H.265/HEVC video decoder chip for 8K Ultra HD applications

  Zhou, D., Wang, S., Sun, H., Zhou, J., Zhu, J., Zhao, Y., Zhou, J., Zhang, S., Kimura, S., Yoshimura, T. & Goto, S., 2016 2 23, 2016 IEEE International Solid-State Circuits Conference, ISSCC 2016. Institute of Electrical and Electronics Engineers Inc., p. 266-268 3 p. 7418009. (Digest of Technical Papers - IEEE International Solid-State Circuits Conference; vol. 59).

  研究成果: Conference contribution
  22 被引用数 (Scopus)

• A 4-phase cross-coupled charge pump with charge sharing clock scheme

  Zhu, H., Huang, M., Zhang, Y. & Yoshihara, T., 2011, International Conference on Electronic Devices, Systems, and Applications. p. 73-76 4 p. 5959067

  研究成果: Conference contribution
  10 被引用数 (Scopus)

• A 5.5-GHZ sige HBT Doherty amplifier using diode linearizer and lumped-element hybrid coupler

  Liu, H. & Yoshimasu, T., 2008 6 1, In: Microwave and Optical Technology Letters. 50, 6, p. 1554-1558 5 p.

  研究成果: Article › 査読
  3 被引用数 (Scopus)

• A 5.83 pj/bit/iteration High-Parallel Performance-Aware LDPC Decoder IP Core Design for WiMAX in 65 nm CMOS

  Zhao, X., Chen, Z., Peng, X., Zhou, D. & Goto, S., 2013, In: IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences. E96-A, 12, p. 2623-2632 10 p.

  研究成果: Article › 査読

• A 530Mpixels/s 4096×2160@60fps H.264/AVC high profile video decoder chip

  Zhou, D., Zhou, J., He, X., Kong, J., Zhu, J., Liu, P. & Goto, S., 2010, IEEE Symposium on VLSI Circuits, Digest of Technical Papers. p. 171-172 2 p. 5560311

  研究成果: Conference contribution
  14 被引用数 (Scopus)

• A 530 Mpixels/s 4096×2160@60fps H.264/AVC high profile video decoder chip

  Zhou, D., Zhou, J., He, X., Zhu, J., Kong, J., Liu, P. & Goto, S., 2011 4, In: IEEE Journal of Solid-State Circuits. 46, 4, p. 777-788 12 p., 5727920.

  研究成果: Article › 査読
  49 被引用数 (Scopus)

• A 530 Mpixels/s intra prediction architecture for ultra high definition H.264/AVC encoder

  He, G., Zhou, D., Zhou, J., Zhang, T. & Goto, S., 2011 4, In: IEICE Transactions on Electronics. E94-C, 4, p. 419-427 9 p.

  研究成果: Article › 査読
  1 被引用数 (Scopus)

• A 5-GHz band WLAN SiGe HBT power amplifier IC with novel adaptive-linearizing CMOS bias circuit

  Yang, X., Sugiura, T., Otani, N., Murakami, T., Otobe, E. & Yoshimasu, T., 2015 7 1, In: IEICE Transactions on Electronics. E98C, 7, p. 651-658 8 p.

  研究成果: Article › 査読
  1 被引用数 (Scopus)

• A 6.72-Gb/s, 8pJ/bit/iteration WPAN LDPC decoder in 65nm CMOS

  Chen, Z., Peng, X., Zhao, X., Okamura, L., Zhou, D. & Goto, S., 2013, Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC. p. 87-88 2 p. 6509569

  研究成果: Conference contribution
  1 被引用数 (Scopus)

• A 6.72-Gb/s 8pJ/bit/iteration IEEE 802.15.3c LDPC decoder chip

  Chen, Z., Peng, X., Zhao, X., Okamura, L., Zhou, D. & Goto, S., 2011 12, In: IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences. E94-A, 12, p. 2587-2596 10 p.

  研究成果: Article › 査読
  1 被引用数 (Scopus)

• A 6.72-Gb/s 8pJ/bit/iteration IEEE 802.15.3c LDPC decoder chip

  Chen, Z., Peng, X., Zhao, X., Xie, Q., Okamura, L., Zhou, D. & Goto, S., 2011, 2011 International Symposium on Integrated Circuits, ISIC 2011. p. 7-12 6 p. 6131868

  研究成果: Conference contribution
  4 被引用数 (Scopus)

• A 600-MHz 54 × 54-bit multiplier with rectangular-styled Wallace tree

  Itoh, N., Naemura, Y., Makino, H., Nakase, Y., Yoshihara, T. & Horiba, Y., 2001 2, In: IEEE Journal of Solid-State Circuits. 36, 2, p. 249-257 9 p.

  研究成果: Article › 査読
  49 被引用数 (Scopus)

• A 600MHz MTJ-based nonvolatile latch making use of incubation time in MTJ switching

  Endoh, T., Togashi, S., Iga, F., Yoshida, Y., Ohsawa, T., Koike, H., Fukami, S., Ikeda, S., Kasai, N., Sakimura, N., Hanyu, T. & Ohno, H., 2011 12 1, 2011 International Electron Devices Meeting, IEDM 2011. p. 4.3.1-4.3.4 6131487. (Technical Digest - International Electron Devices Meeting, IEDM).

  研究成果: Conference contribution
  11 被引用数 (Scopus)

• A 600MIPS 120mW 70μA leakage triple-CPU mobile application processor chip

  Torii, S., Suzuki, S., Tomonaga, H., Tokue, T., Sakai, J., Suzuki, N., Murakami, K., Hiraga, T., Shigemoto, K., Tatebe, Y., Ohbuchi, E., Kayama, N., Edahiro, M., Kusano, T. & Nishi, N., 2005, In: Digest of Technical Papers - IEEE International Solid-State Circuits Conference. 48, p. 102-103+553 7.5.

  研究成果: Conference article › 査読
  1 被引用数 (Scopus)

• A 600MIPS 120mW 70μA leakage triple-CPU mobile application processor chip

  Torii, S., Suzuki, S., Tomonaga, H., Tokue, T., Sakai, J., Suzuki, N., Murakami, K., Hiraga, T., Shigemoto, K., Tatebe, Y., Ohbuchi, E., Kayama, N., Edahiro, M., Kusano, T. & Nishi, N., 2005, In: Digest of Technical Papers - IEEE International Solid-State Circuits Conference. 48, p. 136-137+589

  研究成果: Conference article › 査読
  35 被引用数 (Scopus)

• A 60-GHz compact mobile terminal for full-duplex radio-on-fiber system

  Yang, K. S., Choi, S. T., Kim, Y. H., Nishi, S., Shimizu, S. & Tokuda, K., 2005 3 20, In: Microwave and Optical Technology Letters. 44, 6, p. 504-507 4 p.

  研究成果: Article › 査読
  3 被引用数 (Scopus)

• A 60-GHz point-to-multipoint millimeter-wave fiber-radio communication system

  Choi, S. T., Yang, K. S., Nishi, S., Shimizu, S., Tokuda, K. & Kim, Y. H., 2006 5, In: IEEE Transactions on Microwave Theory and Techniques. 54, 5, p. 1953-1960 8 p.

  研究成果: Article › 査読
  36 被引用数 (Scopus)

• A 60-ns 16-Mb flash EEPROM with program and erase sequence controller

  Nakayama, T., Kobayashi, S. I., Miyawaki, Y., Terada, Y., Ajika, N., Ohi, M., Arima, H., Matsukawa, T., Yoshihara, T. & Suzuki, K., 1991 11, In: IEEE Journal of Solid-State Circuits. 26, 11, p. 1600-1605 6 p.

  研究成果: Article › 査読
  2 被引用数 (Scopus)

• A 60-ns 4-Mbit CMOS DRAM with Built-In Self-Test Function

  Ohsawa, T., Furuyama, T., Watanabe, Y., Tanaka, H., Natori, K., Shinozaki, S., Tanaka, T., Yamano, S., Nagahama, Y., Kushiyama, N. & Tsuchida, K., 1987 10, In: IEEE Journal of Solid-State Circuits. 22, 5, p. 663-668 6 p.

  研究成果: Article › 査読
  16 被引用数 (Scopus)

• A 610 Mbin/s CABAC decoder for H.265/HEVC level 6.1 applications

  Zhao, Y., Zhou, J., Zhou, D. & Goto, S., 2014 1 28, 2014 IEEE International Conference on Image Processing, ICIP 2014. Institute of Electrical and Electronics Engineers Inc., p. 1268-1272 5 p. 7025253

  研究成果: Conference contribution
  4 被引用数 (Scopus)