A 0.186-pJ per Bit Latch-Based True Random Number Generator with Mismatch Compensation and Random Noise Enhancement

Ruilin Zhang*, Xingyu Wang, Luying Wang, Xinpeng Chen, Fan Yang, Kunyang Liu, Hirofumi Shinohara

*この研究の対応する著者

研究成果: Conference contribution

6 被引用数 (Scopus)

抄録

A calibration and feedback control-free latch-based true random-number generator (TRNG) is presented. It features a mismatch self-compensation and a random noise enhancement technique to drastically improve the noise-to-mismatch ratio. By employing the XOR function of only 4-bit entropy sources, the proposed TRNG can efficiently operate across a wide voltage (0.3∼1.0 V) and temperature (-20∼100°C) range. An 8-bit von Neumann with waiting (VN8W) post-processing technique is used to extract full entropy bitstreams, which have been verified by the NIST-SP 800-22 randomness tests. Robustness against supply noise injection attack is also demonstrated. The proposed TRNG is fabricated in 130-nm CMOS technology and achieves the state-of-the-art energy of 0.186 pJ/bit at 0.3 V with a core area of 661 um2 (0.039 MF2).

本文言語English
ホスト出版物のタイトル2021 Symposium on VLSI Circuits, VLSI Circuits 2021
出版社Institute of Electrical and Electronics Engineers Inc.
ISBN(電子版)9784863487796
DOI
出版ステータスPublished - 2021 6月 13
イベント35th Symposium on VLSI Circuits, VLSI Circuits 2021 - Virutal, Online
継続期間: 2021 6月 132021 6月 19

出版物シリーズ

名前IEEE Symposium on VLSI Circuits, Digest of Technical Papers
2021-June

Conference

Conference35th Symposium on VLSI Circuits, VLSI Circuits 2021
CityVirutal, Online
Period21/6/1321/6/19

ASJC Scopus subject areas

  • 電子材料、光学材料、および磁性材料
  • 電子工学および電気工学

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