A 0.3mW 1.4mm2 motion estimation processor for mobile video application

Seiichiro Hiratsuka, Satoshi Goto, Takeshi Ikenaga

研究成果: Paper

2 引用 (Scopus)

抜粋

Motion estimation (ME) is a key processing in video encoding systems. Since it requires huge computational complexity, many algorithms and LSI architectures have been proposed to reduce it. Conventional LSIs, however, are not sufficient for mobile applications which require both flexibility and low power dissipation. This paper describes an application specific instruction processor (ASIP) LSI for ME processing. It has a dedicated unit for SAD (sum of absolute difference) operations. By applying our proposed ultra-low ME algorithm named ULCMEA, it can reduce power while keeping high flexibility. A chip capable of operating at 80 MHz was fabricated using TSMC 0.18-μm CMOS technology. 15K logic gates and 32 Kbit SRAM have been integrated into 1.4 mm2 chip. Typical power dissipation is 0.3-mW for QCIF 15 frame/sec ME processing.

元の言語English
ページ103-106
ページ数4
DOI
出版物ステータスPublished - 2006 12 1
イベント2006 IEEE Asian Solid-State Circuits Conference, ASSCC 2006 - Hangzhou, China
継続期間: 2006 11 132006 11 15

Conference

Conference2006 IEEE Asian Solid-State Circuits Conference, ASSCC 2006
China
Hangzhou
期間06/11/1306/11/15

    フィンガープリント

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Electronic, Optical and Magnetic Materials

これを引用

Hiratsuka, S., Goto, S., & Ikenaga, T. (2006). A 0.3mW 1.4mm2 motion estimation processor for mobile video application. 103-106. 論文発表場所 2006 IEEE Asian Solid-State Circuits Conference, ASSCC 2006, Hangzhou, China. https://doi.org/10.1109/ASSCC.2006.357862