A 0.5-V 2.07-fJ/b 497-F2 EE/CMOS Hybrid SRAM Physically Unclonable Function with < 1E-7 Bit Error Rate Achieved through Hot Carrier Injection Burn-in

Kunyang Liu, Hongliang Pu, Hirofumi Shinohara

研究成果: Conference contribution

抄録

This paper presents a bit-error free SRAM-based physically unclonable function (PUF) in 130-nm standard CMOS. The PUF has a compact bitcell, with a bitcell area of 497 F2. It switches from EE SRAM to CMOS SRAM mode during evaluation, achieving high native stability, low-voltage evaluation, and low-power operation. Its stability is reinforced to 100% through hot carrier injection (HCI) burn-in on the alternate-direction nMOS load, which causes no visible oxide damage and does not require additional fabrication processes or extra transistors in the bitcell. Experimental results show that the prototype chips achieved actual zero bit error across 0.5-0.7 V and -40°C to 120 °C, as well as zero error (<1E-7 BER) at the worst VT corner after accelerated aging test equivalent to 21 years of operation. The PUF functions stably down to 0.5 V, with an energy of 2.07 fJ/b, which includes both the evaluation and read-out power. The secure, compact, low-power and 100% stable features of the PUF make it an excellent candidate for the resource-constrained Internet of Things security.

本文言語English
ホスト出版物のタイトル2020 IEEE Custom Integrated Circuits Conference, CICC 2020
出版社Institute of Electrical and Electronics Engineers Inc.
ISBN(電子版)9781728160313
DOI
出版ステータスPublished - 2020 3
イベント2020 IEEE Custom Integrated Circuits Conference, CICC 2020 - Boston, United States
継続期間: 2020 3 222020 3 25

出版物シリーズ

名前Proceedings of the Custom Integrated Circuits Conference
2020-March
ISSN(印刷版)0886-5930

Conference

Conference2020 IEEE Custom Integrated Circuits Conference, CICC 2020
CountryUnited States
CityBoston
Period20/3/2220/3/25

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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