A 100MHz dual port (DP) MRAM with swing-less bit-line sensing (SLBS) operation for high-end microcomputer systems

Hu Li, Leona Okamura, Tsutomu Yoshihara, Tsukasa Ooishi, Yuji Kihara

    研究成果: Conference contribution

    抄録

    In this paper, we propose two kinds of implementations of the dual port MRAM, one of which is for the read/write concurrent operation while another is for the additional simultaneous read operation. Compared with dual port SRAM, the dual port MRAM accompanied with smaller memory cell size will make high performance systems realized in the mobile/robotics field. A swing-less bit-line sensing (SLBS) technique and the static bitline level in the read mode, help to realize the high performance under the condition of Vcc=1.0V and the operation frequency of 100MHz.

    本文言語English
    ホスト出版物のタイトル2006 International Symposium on Communications and Information Technologies, ISCIT
    ページ63-66
    ページ数4
    DOI
    出版ステータスPublished - 2006
    イベント2006 International Symposium on Communications and Information Technologies, ISCIT - Bangkok
    継続期間: 2006 10 182006 10 20

    Other

    Other2006 International Symposium on Communications and Information Technologies, ISCIT
    CityBangkok
    Period06/10/1806/10/20

    ASJC Scopus subject areas

    • Computer Networks and Communications
    • Hardware and Architecture
    • Electrical and Electronic Engineering

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