A 1.59 Gpixel/s motion estimation processor with -211 to +211 search range for UHDTV video encoder

Dajiang Zhou, Jinjia Zhou, Gang He, Satoshi Goto

研究成果: Article

20 引用 (Scopus)

抜粋

3840 × 2160 and 7680 × 4320 UHDTV formats deliver remarkably enhanced visual experience relative to high definition but in the meanwhile involve huge complexity and memory bandwidth requirements in video encoding. Especially, enlarged motion distances of UHDTV lead to additional difficulties in the implementation of motion estimation, which is originally the most critical bottleneck of an encoder. This paper presents a motion estimation processor design for H.264/AVC. A test chip is implemented in 40 nm CMOS. With algorithm and architecture co-optimization, the processor delivers a maximum throughput of 1.59 Gpixel/s for 7680 × 4320 48 fps video, at least 7.5 times faster than previous designs. The corresponding core power dissipation is 622 mW at 210 MHz, with energy efficiency improved by at least 23%. The chip's DRAM bandwidth requirement is also 68% lower than previous chips. With a maximum search range of ±211 (horizontal) by ±106 (vertical) around a predictive search center, the proposed motion estimation processor well accommodates the high motion of UHDTV.

元の言語English
記事番号6687281
ページ(範囲)827-837
ページ数11
ジャーナルIEEE Journal of Solid-State Circuits
49
発行部数4
DOI
出版物ステータスPublished - 2014

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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