A 16M SRAM with improved characteristics using DRAM technology

Yuji Kihara, Yasushi Nakashima, Takashi Izutsu, Masayuki Nakamoto, Yasuhiro Konishi, Tsutomu Yoshihara

    研究成果: Conference contribution

    5 引用 (Scopus)

    抜粋

    A 16Mbit Low Power SRAM with 0.98um2 cells using 0.15um DRAM and TFT technology has been developed. A new type memory cell technology achieves enough low power, low cost and high soft error immunity without large investment. By these improved characteristics some customers at industrial machines and handy devices decided to use this new type of SRAM by compatibility with SRAM.

    元の言語English
    ホスト出版物のタイトル2005 IEEE Asian Solid-State Circuits Conference, ASSCC 2005
    ページ17-20
    ページ数4
    DOI
    出版物ステータスPublished - 2006
    イベント1st IEEE Asian Solid-State Circuits Conference, ASSCC 2005 - Hsinchu
    継続期間: 2005 11 12005 11 3

    Other

    Other1st IEEE Asian Solid-State Circuits Conference, ASSCC 2005
    Hsinchu
    期間05/11/105/11/3

    ASJC Scopus subject areas

    • Electrical and Electronic Engineering
    • Electronic, Optical and Magnetic Materials

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  • これを引用

    Kihara, Y., Nakashima, Y., Izutsu, T., Nakamoto, M., Konishi, Y., & Yoshihara, T. (2006). A 16M SRAM with improved characteristics using DRAM technology. : 2005 IEEE Asian Solid-State Circuits Conference, ASSCC 2005 (pp. 17-20). [4017520] https://doi.org/10.1109/ASSCC.2005.251778