A 24.5-53.6pJ/pixel 4320p 60fps H.264/AVC intra-frame video encoder chip in 65nm CMOS

Dajiang Zhou, Gang He, Wei Fei, Zhixiang Chen, Jinjia Zhou, Satoshi Goto

研究成果: Conference contribution

抜粋

An H.264/AVC intra-frame video encoder is implemented in 65nm CMOS. With an efficient intra prediction design, its maximum throughput reaches 1991Mpixels/s for 7680×4320p 60fps video, 9.4x to 32x faster than previous designs. The encoder also incorporates a 1.41Gbins/s CABAC architecture that has been enhanced by 31%. Moreover, low energy consumption is achieved by the high parallelism and hardware efficiency of this design. 1080p 30fps encoding dissipates only 2mW at 0.8V and 9MHz.

元の言語English
ホスト出版物のタイトルProceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC
ページ73-74
ページ数2
DOI
出版物ステータスPublished - 2013
イベント2013 18th Asia and South Pacific Design Automation Conference, ASP-DAC 2013 - Yokohama
継続期間: 2013 1 222013 1 25

Other

Other2013 18th Asia and South Pacific Design Automation Conference, ASP-DAC 2013
Yokohama
期間13/1/2213/1/25

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Computer Science Applications
  • Computer Graphics and Computer-Aided Design

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  • これを引用

    Zhou, D., He, G., Fei, W., Chen, Z., Zhou, J., & Goto, S. (2013). A 24.5-53.6pJ/pixel 4320p 60fps H.264/AVC intra-frame video encoder chip in 65nm CMOS. : Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC (pp. 73-74). [6509562] https://doi.org/10.1109/ASPDAC.2013.6509562