This paper presents an Enhancement-Enhancement (EE) SRAM physically unclonable function (PUF) with a dark-bit detection technique based on an integrated Vss-bias generator. The EE SRAM PUF cell improves native stability to 0.21% bit-error rate (BER). Bit cells that are potentially unstable due to environmental variations or aging are detected via the lightweight bias generator to ensure stability, and the effectiveness is verified with experimental results of dark-bit detection performed at room temperature. Measurement results of 10 chips in 130-nm CMOS show that after masking the detected dark bits, 1.3×10 -6 BER is achieved across 0.8-1.4 V/-40-120 °C VT corners. The nMOS-only bit cell is also highly compact (i.e., 373 F 2 ). Moreover, a 2D power-gating scheme is implemented for low operation energy, low standby power, and high attack tolerance.