A 4320p 60fps H.264/AVC intra-frame encoder chip with 1.41Gbins/s CABAC

Dajiang Zhou, Gang He, Wei Fei, Zhixiang Chen, Jinjia Zhou, Satoshi Goto

研究成果: Conference contribution

7 引用 (Scopus)

抜粋

An H.264/AVC intra-frame video encoder is implemented in 65nm CMOS. With an efficient intra prediction design, its maximum throughput reaches 1991Mpixels/s for 7680x4320p 60fps video, 9.4x to 32x faster than previous designs. The encoder also incorporates a 1.41Gbins/s CABAC architecture that has been enhanced by 31%. Moreover, low energy consumption is achieved by the high parallelism and hardware efficiency of this design. 1080p30 encoding dissipates only 2mW at 0.8V and 9MHz.

元の言語English
ホスト出版物のタイトルIEEE Symposium on VLSI Circuits, Digest of Technical Papers
ページ154-155
ページ数2
DOI
出版物ステータスPublished - 2012
イベント2012 Symposium on VLSI Circuits, VLSIC 2012 - Honolulu, HI
継続期間: 2012 6 132012 6 15

Other

Other2012 Symposium on VLSI Circuits, VLSIC 2012
Honolulu, HI
期間12/6/1312/6/15

    フィンガープリント

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Electronic, Optical and Magnetic Materials

これを引用

Zhou, D., He, G., Fei, W., Chen, Z., Zhou, J., & Goto, S. (2012). A 4320p 60fps H.264/AVC intra-frame encoder chip with 1.41Gbins/s CABAC. : IEEE Symposium on VLSI Circuits, Digest of Technical Papers (pp. 154-155). [6243836] https://doi.org/10.1109/VLSIC.2012.6243836