A 66-dBc fundamental suppression frequency doubler IC for UWB sensor applications

Jiangtao Sun*, Qing Liu, Yong Ju Suh, Takayuki Shibata, Toshihiko Yoshimasu

*この研究の対応する著者

研究成果: Article査読

2 被引用数 (Scopus)

抄録

A balanced push-push frequency doubler has been demonstrated in 0.25-μm SOI (Silicon on Insulator) SiGe BiCMOS technology operating from 22 GHz to 29 GHz with high fundamental frequency suppression and high conversion gain. A series LC resonator circuit is connected in parallel with the differential outputs of the doubler core circuit. The LC resonator is effective to improve the fundamental frequency suppression. In addition, the LC resonator works as a matching circuit between the output of the doubler core and the input of the output buffer amplifier, which increases the conversion gain of the whole circuit. A measured fundamental frequency suppression of greater than 46 dBc is achieved at an input power of -10 dBm in the output frequency band of 22-29 GHz. Moreover, maximum fundamental frequency suppression of 66 dBc is achieved at an input frequency of 13 GHz and an input power of -10 dBm. The frequency doubler works at a supply voltage of 3.3V.

本文言語English
ページ(範囲)575-581
ページ数7
ジャーナルIEICE Transactions on Electronics
E94-C
4
DOI
出版ステータスPublished - 2011 4

ASJC Scopus subject areas

  • 電子材料、光学材料、および磁性材料
  • 電子工学および電気工学

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