A clock net reassignment algorithm using Voronoi diagram

Masato Edahiro

研究成果: Conference contribution

3 被引用数 (Scopus)

抄録

A novel algorithm is presented for the clock net reassignment problem in semi-custom layout design. The clock net reassignment is used to shorten clock nets by reconnecting clock drivers and flip-flops so as to obtain high performance LSIs. The proposed algorithm, by using the Voronoi diagram in computational geometry, is quite efficient and gives better assignments than existing techniques. The experimental results show that the algorithm yields a 10% reduction in net lengths in comparison with existing algorithms. The algorithm takes only 18 s to find an assignment for 167 drivers and 833 flip-flops.

本文言語English
ホスト出版物のタイトル1990 IEEE International Conference on Computer-Aided Design. Digest of Technical Papers
出版社Publ by IEEE
ページ420-423
ページ数4
ISBN(印刷版)0818620552
出版ステータスPublished - 1990
外部発表はい
イベント1990 IEEE International Conference on Computer-Aided Design - ICCAD-90 - Santa Clara, CA, USA
継続期間: 1990 11 111990 11 15

出版物シリーズ

名前1990 IEEE International Conference on Computer-Aided Design. Digest of Technical Papers

Other

Other1990 IEEE International Conference on Computer-Aided Design - ICCAD-90
CitySanta Clara, CA, USA
Period90/11/1190/11/15

ASJC Scopus subject areas

  • 工学(全般)

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