A CMOS low-voltage reference based on body effect and switched-capacitor technique

Yudong Lin, Hao Zhang, Tsutomu Yoshihara

    研究成果: Conference contribution

    1 被引用数 (Scopus)

    抄録

    A low power CMOS voltage reference using body effect and switched-capacitor technique is presented in this paper. The output voltage is produced by the gate-source voltage. The MOSFETs are working on subthreshold region thus the power consumption is greatly reduced. By utilizing the switched-capacitor technique, only one transistor is required to generate the reference voltage, so that the threshold voltage mismatch in conventional two-transistor configuration is eliminated. The proposed circuit is designed and simulated under 0.18-μm CMOS technology. The output voltage is 117.68 mV, and the temperature coefficient is less than 50.0 ppm/°C ranging from -40 °C to 80 °C. The voltage line-sensitivity is 0.19 %/V ranging from 1.2 V to 3.2 V. The average current consumption is about 95 nA.

    本文言語English
    ホスト出版物のタイトルISOCC 2013 - 2013 International SoC Design Conference
    出版社IEEE Computer Society
    ページ91-94
    ページ数4
    ISBN（印刷版）9781479911417
    DOI
    出版ステータスPublished - 2013
    イベント2013 International SoC Design Conference, ISOCC 2013 - Busan
    継続期間: 2013 11 17 → 2013 11 19

    Other

    Other2013 International SoC Design Conference, ISOCC 2013
    CityBusan
    Period13/11/17 → 13/11/19

    ASJC Scopus subject areas

    • Hardware and Architecture
    • Electrical and Electronic Engineering

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