A CMOS low-voltage reference based on body effect and switched-capacitor technique

Yudong Lin; Hao Zhang; Tsutomu Yoshihara

doi:10.1109/ISOCC.2013.6863994

A CMOS low-voltage reference based on body effect and switched-capacitor technique

Yudong Lin, Hao Zhang, Tsutomu Yoshihara

研究成果: Conference contribution

2 被引用数 (Scopus)

抄録

A low power CMOS voltage reference using body effect and switched-capacitor technique is presented in this paper. The output voltage is produced by the gate-source voltage. The MOSFETs are working on subthreshold region thus the power consumption is greatly reduced. By utilizing the switched-capacitor technique, only one transistor is required to generate the reference voltage, so that the threshold voltage mismatch in conventional two-transistor configuration is eliminated. The proposed circuit is designed and simulated under 0.18-μm CMOS technology. The output voltage is 117.68 mV, and the temperature coefficient is less than 50.0 ppm/°C ranging from -40 °C to 80 °C. The voltage line-sensitivity is 0.19 %/V ranging from 1.2 V to 3.2 V. The average current consumption is about 95 nA.

本文言語	English
ホスト出版物のタイトル	ISOCC 2013 - 2013 International SoC Design Conference
出版社	IEEE Computer Society
ページ	91-94
ページ数	4
ISBN（印刷版）	9781479911417
DOI	https://doi.org/10.1109/ISOCC.2013.6863994
出版ステータス	Published - 2013
イベント	2013 International SoC Design Conference, ISOCC 2013 - Busan 継続期間: 2013 11 17 → 2013 11 19

Other

Other	2013 International SoC Design Conference, ISOCC 2013
City	Busan
Period	13/11/17 → 13/11/19

ASJC Scopus subject areas

ハードウェアとアーキテクチャ
電子工学および電気工学

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10.1109/ISOCC.2013.6863994

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引用スタイル

@inproceedings{922a16353810414b87397fc8c203889a,

title = "A CMOS low-voltage reference based on body effect and switched-capacitor technique",

abstract = "A low power CMOS voltage reference using body effect and switched-capacitor technique is presented in this paper. The output voltage is produced by the gate-source voltage. The MOSFETs are working on subthreshold region thus the power consumption is greatly reduced. By utilizing the switched-capacitor technique, only one transistor is required to generate the reference voltage, so that the threshold voltage mismatch in conventional two-transistor configuration is eliminated. The proposed circuit is designed and simulated under 0.18-μm CMOS technology. The output voltage is 117.68 mV, and the temperature coefficient is less than 50.0 ppm/°C ranging from -40 °C to 80 °C. The voltage line-sensitivity is 0.19 %/V ranging from 1.2 V to 3.2 V. The average current consumption is about 95 nA.",

keywords = "body effect, CMOS, Low-voltage, sub-threshold, switched-capacitor technique, voltage reference",

author = "Yudong Lin and Hao Zhang and Tsutomu Yoshihara",

year = "2013",

doi = "10.1109/ISOCC.2013.6863994",

language = "English",

isbn = "9781479911417",

pages = "91--94",

booktitle = "ISOCC 2013 - 2013 International SoC Design Conference",

publisher = "IEEE Computer Society",

note = "2013 International SoC Design Conference, ISOCC 2013 ; Conference date: 17-11-2013 Through 19-11-2013",

}

TY - GEN

T1 - A CMOS low-voltage reference based on body effect and switched-capacitor technique

AU - Lin, Yudong

AU - Zhang, Hao

AU - Yoshihara, Tsutomu

PY - 2013

Y1 - 2013

N2 - A low power CMOS voltage reference using body effect and switched-capacitor technique is presented in this paper. The output voltage is produced by the gate-source voltage. The MOSFETs are working on subthreshold region thus the power consumption is greatly reduced. By utilizing the switched-capacitor technique, only one transistor is required to generate the reference voltage, so that the threshold voltage mismatch in conventional two-transistor configuration is eliminated. The proposed circuit is designed and simulated under 0.18-μm CMOS technology. The output voltage is 117.68 mV, and the temperature coefficient is less than 50.0 ppm/°C ranging from -40 °C to 80 °C. The voltage line-sensitivity is 0.19 %/V ranging from 1.2 V to 3.2 V. The average current consumption is about 95 nA.

AB - A low power CMOS voltage reference using body effect and switched-capacitor technique is presented in this paper. The output voltage is produced by the gate-source voltage. The MOSFETs are working on subthreshold region thus the power consumption is greatly reduced. By utilizing the switched-capacitor technique, only one transistor is required to generate the reference voltage, so that the threshold voltage mismatch in conventional two-transistor configuration is eliminated. The proposed circuit is designed and simulated under 0.18-μm CMOS technology. The output voltage is 117.68 mV, and the temperature coefficient is less than 50.0 ppm/°C ranging from -40 °C to 80 °C. The voltage line-sensitivity is 0.19 %/V ranging from 1.2 V to 3.2 V. The average current consumption is about 95 nA.

KW - body effect

KW - CMOS

KW - Low-voltage

KW - sub-threshold

KW - switched-capacitor technique

KW - voltage reference

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U2 - 10.1109/ISOCC.2013.6863994

DO - 10.1109/ISOCC.2013.6863994

M3 - Conference contribution

AN - SCOPUS:84906916687

SN - 9781479911417

SP - 91

EP - 94

BT - ISOCC 2013 - 2013 International SoC Design Conference

PB - IEEE Computer Society

T2 - 2013 International SoC Design Conference, ISOCC 2013

Y2 - 17 November 2013 through 19 November 2013

ER -

A CMOS low-voltage reference based on body effect and switched-capacitor technique

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