A CMOS voltage reference combining body effect with switched-current technique

Ning Ren, Hao Zhang, Tsutomu Yoshihara

    研究成果: Conference contribution

    2 引用 (Scopus)

    抜粋

    A precise CMOS voltage reference using body effect and switched-current technique is presented in this paper. To reduce static current, the threshold voltage with body effect in nMOSFET transistor is utilized instead of the V BE of BJT transistor. Owning to the switched-current technique, only one transistor is required to generate the reference voltage, so that the threshold voltage mismatch in conventional two-transistor configuration is eliminated. The proposed circuit is designed and simulated under 0.18-μm CMOS technology. The output voltage is 147.44 mV, and the temperature coefficient is less than 5.2 ppm/°C ranging from -20 °C to 100 °C. The voltage line-sensitivity is 0.44 %/V ranging from 1.5 V to 3.3 V. The power-supply-rejection-ratio (PSRR) is -56 dB at 100 Hz. The average current consumption is about 16 μA.

    元の言語English
    ホスト出版物のタイトルISOCC 2012 - 2012 International SoC Design Conference
    ページ92-95
    ページ数4
    DOI
    出版物ステータスPublished - 2012
    イベント2012 International SoC Design Conference, ISOCC 2012 - Jeju Island
    継続期間: 2012 11 42012 11 7

    Other

    Other2012 International SoC Design Conference, ISOCC 2012
    Jeju Island
    期間12/11/412/11/7

    ASJC Scopus subject areas

    • Hardware and Architecture
    • Electrical and Electronic Engineering

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  • これを引用

    Ren, N., Zhang, H., & Yoshihara, T. (2012). A CMOS voltage reference combining body effect with switched-current technique. : ISOCC 2012 - 2012 International SoC Design Conference (pp. 92-95). [6407047] https://doi.org/10.1109/ISOCC.2012.6407047