A generalized v-shaped multilevel method for large scale floorplanning

Song Chen, Zheng Xu, Takeshi Yoshimura

研究成果: Conference contribution

3 被引用数 (Scopus)

抄録

In this paper, we propose a generalized V-shaped multilevel floorplanning method with consideration of fixedoutline constraint. The Sequence Pair is used as the floorplan representation. The proposed multilevel method (ML-IARFP) adopts a two-stage structure: top-down partitioning and floorplanning followed by bottom-up merging and refinement. At the first stage, we recursively partition and floorplan the circuits until there are limited number blocks in each sub-circuit. Since we use a multi-partitioning instead of bi-partitioning, general non-slicing floorplan structures are explored in each level, which potentially lead to more effective exploration of the solution space. At the second stage, using a multilevel sequence pair structure, we recursively merge the sub-circuits into bigger circuits and do the refinement. Compared with IMF, Capo 10.2 and IARFP, MLIARFP obtained the best results under fixed-outline constraints, and compared with IARFP, it achieved 9% wirelength reduction on average and showed a better scalability.

本文言語English
ホスト出版物のタイトルProceedings of the 10th International Symposium on Quality Electronic Design, ISQED 2009
ページ734-739
ページ数6
DOI
出版ステータスPublished - 2009
イベント10th International Symposium on Quality Electronic Design, ISQED 2009 - San Jose, CA
継続期間: 2009 3 162009 3 18

Other

Other10th International Symposium on Quality Electronic Design, ISQED 2009
CitySan Jose, CA
Period09/3/1609/3/18

ASJC Scopus subject areas

  • Hardware and Architecture
  • Electrical and Electronic Engineering

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