A GIDL (Gate Induced Drain Leakage) current model for advanced MOS-FETs is proposed and implemented into HiSIM2, complete surface potential based MOSFET model. The model considers two tunneling mechanisms, the band-to-band tunneling and the trap assisted tunneling. Totally 7 model parameters are introduced. Simulation results of NFETs and PFETs reproduce measurements for any device size without binning of model parameters. The influence of the GIDL current is investigated with circuits, which are sensitive to the change of the stored charge due to the GIDL current.
|ジャーナル||IPSJ Transactions on System LSI Design Methodology|
|出版物ステータス||Published - 2009|
ASJC Scopus subject areas
- Electrical and Electronic Engineering
- Computer Science Applications