A high-level synthesis system for digital signal processing based on data-flow graph enumeration

Mathematics

• High-level Synthesis 100%
• Digital Signal Processing 72%
• Flow Graphs 68%
• Data Flow 67%
• Hardware 49%
• Enumeration 46%
• Performance Evaluation 13%
• Design 12%
• Scheduling 10%
• Experimental Results 10%
• Benchmark 9%
• Resources 9%
• Synthesis 9%
• Language 7%

Engineering & Materials Science

• Data flow graphs 72%
• High level synthesis 64%
• Digital signal processing 51%
• Computer hardware 29%
• Computer hardware description languages 17%
• Scheduling 11%