抄録
Motion compensation is widely used in many video coding standards. Due to its bandwidth requirement and complexity, motion compensation is one of the most challenging parts in the design of high definition video decoder. In this paper, we propose a high performance and low bandwidth motion compensation design, which supports H.264/AVC, MPEG-1/2 and Chinese AVS standards. We introduce a 2-Dimensional cache that can greatly reduce the external bandwidth requirement. Similarities among the 3 standards are also explored to reduce hardware cost. We also propose a block-pipelining strategy to conceal the long latency of external memory access. Experimental results show that our motion compensation design can reduce the bandwidth by 74% in average and it can real-time decode 1920x1088@30 fps video stream at 80 MHz.
本文言語 | English |
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ページ(範囲) | 253-260 |
ページ数 | 8 |
ジャーナル | IEICE Transactions on Electronics |
巻 | E93-C |
号 | 3 |
DOI | |
出版ステータス | Published - 2010 |
外部発表 | はい |
ASJC Scopus subject areas
- 電子工学および電気工学
- 電子材料、光学材料、および磁性材料