A highly parallel FPGA implementation of a 2D-clustering algorithm for the ATLAS Fast TracKer (FTK) processor

N. Kimura, A. Annovi, M. Beretta, M. Gatta, S. Gkaitatzis, T. Iizawa, K. Kordas, T. Korikawa, S. Nikolaidis, C. Petridou, C. L. Sotiropoulou, Kohei Yorita, G. Volpi

    研究成果: Conference contribution

    抜粋

    The highly parallel 2D-clustering FPGA implementation used for the input system of the Fast TracKer (FTK) processor for the ATLAS experiment of the Large Hadron Collider (LHC) at CERN is presented. The LHC after the 2013-2014 shutdown periods is planned to have increased luminosity, which will make it more difficult to have efficient online selection of rare events due to the increase of the overlapping collisions. FTK is a highly-parallelized hardware system that improves the online selection by executing real time track finding using the information from the silicon inner detector. The FTK system requires fast and robust clustering of the hits retrieved from the silicon detector on FPGA devices. We show the development of the original input boards and the implemented clustering algorithm. For the complicated 2D-clustering, a moving window technique is used to minimize the use of FPGA resources. The combination of custom developed boards and implementation of the clustering algorithm provides sufficient processing power to meet the specifications for the silicon inner detector of ATLAS up to the maximum LHC luminosity planned until 2022. The developed algorithm is easily adjustable to other image processing applications that require real-time 2D-clustering.

    元の言語English
    ホスト出版物のタイトル2014 19th IEEE-NPSS Real Time Conference, RT 2014 - Conference Records
    出版者Institute of Electrical and Electronics Engineers Inc.
    ISBN(印刷物)9781479936595
    DOI
    出版物ステータスPublished - 2015 4 28
    イベント2014 19th IEEE-NPSS Real Time Conference, RT 2014 - Nara, Japan
    継続期間: 2014 5 262014 5 30

    Other

    Other2014 19th IEEE-NPSS Real Time Conference, RT 2014
    Japan
    Nara
    期間14/5/2614/5/30

      フィンガープリント

    ASJC Scopus subject areas

    • Computational Theory and Mathematics
    • Computer Networks and Communications
    • Software
    • Electrical and Electronic Engineering
    • Information Systems

    これを引用

    Kimura, N., Annovi, A., Beretta, M., Gatta, M., Gkaitatzis, S., Iizawa, T., Kordas, K., Korikawa, T., Nikolaidis, S., Petridou, C., Sotiropoulou, C. L., Yorita, K., & Volpi, G. (2015). A highly parallel FPGA implementation of a 2D-clustering algorithm for the ATLAS Fast TracKer (FTK) processor. : 2014 19th IEEE-NPSS Real Time Conference, RT 2014 - Conference Records [7097431] Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/RTC.2014.7097431