A low-kickback-noise latched comparator for high-speed flash analog-to-digital converters

Jia Chen, Satoshi Kurachi, Shimin Shen, Haiwen Liu, Toshihiko Yoshimasu, Yong Ju Suh

研究成果: Conference contribution

8 被引用数 (Scopus)

抄録

In traditional comparators especially for flash ADCs, one serious problem is the kick back noise, which disturbs the input signal voltages and consequently might cause errors at the outputs of the ADCs. In this paper, we propose a novel CMOS latched comparator with very low kickback noise for high-speed flash ADCs. The proposed comparator separates analog preamplifier from the positive feedback digital dynamic latch so as to reduce the influence of the kickback noise. Simulation results based on a mixed signal CMOS 0.35um technology show that, this comparator can work at a maximum clock frequency of 500MHz with very reduced kickback noise compared with conventional architectures.

本文言語English
ホスト出版物のタイトルISCIT 2005 - International Symposium on Communications and Information Technologies 2005, Proceedings
ページ250-253
ページ数4
DOI
出版ステータスPublished - 2005 12 1
イベントISCIT 2005 - International Symposium on Communications and Information Technologies 2005 - Beijing, China
継続期間: 2005 10 122005 10 14

出版物シリーズ

名前ISCIT 2005 - International Symposium on Communications and Information Technologies 2005, Proceedings
II

Conference

ConferenceISCIT 2005 - International Symposium on Communications and Information Technologies 2005
CountryChina
CityBeijing
Period05/10/1205/10/14

ASJC Scopus subject areas

  • Engineering(all)

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