A metal-insulator-semiconductor (Mis) device using a ferroelectric polymer thin film in the gate insulator

Noriyoshi Yamauchi

研究成果: Article査読

62 被引用数 (Scopus)

抄録

A nonvolatile MIS memory device using a ferroelectric polymer thin film in the gate insulator is proposed. In the gate electrode of the device, a ferroelectric polymer thin film is sandwiched between two insulator films to prevent carrier injection into the polymer thin film. Al-SiO2-P (VDF/TrFE)-SiO2-Si capacitors were fabricated to evaluate the basic characteristics of the device by C- V measurement, and ferroelectric polarization reversal was observed in the capacitors. Based on the C-V measurements, MIS transistors were fabricated using a process which virtually self-aligns the effective gate area to the source/drain. It was shown that the MIS transistor could be electrically programmed and erased. The on/off ratio of the transistor was greater than 106.

本文言語English
ページ(範囲)590-594
ページ数5
ジャーナルJapanese journal of applied physics
25
4
DOI
出版ステータスPublished - 1986 4
外部発表はい

ASJC Scopus subject areas

  • Engineering(all)
  • Physics and Astronomy(all)

フィンガープリント 「A metal-insulator-semiconductor (Mis) device using a ferroelectric polymer thin film in the gate insulator」の研究トピックを掘り下げます。これらがまとまってユニークなフィンガープリントを構成します。

引用スタイル