A New MOS Integrated Circuit Fabrication Using Si3N4 Film Self-Alignment Liftoff Techniques

Toshiaki Yachi, Noriyoshi Yamauchi

研究成果: Article査読

3 被引用数 (Scopus)

抄録

A new MOS integrated circuits fabrication process that realizes self-aligned source and drain contact hole formation is described. This process utilizes a Si3N4 film self-alignment liftoff technique for selective oxidation (SALTS). Devices are fabricated using SALTS. It is shown that device packing density and speed show a 30-percent or more improvement over the conventional method at the same minimum lithographic feature size. It is also shown that Si3N4 film deposited using the sputtering method does not cause any degradation in device characteristics.

本文言語English
ページ(範囲)243-247
ページ数5
ジャーナルIEEE Transactions on Electron Devices
29
2
DOI
出版ステータスPublished - 1982 2
外部発表はい

ASJC Scopus subject areas

  • 電子材料、光学材料、および磁性材料
  • 電子工学および電気工学

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