A novel hetero-junction Tunnel-FET using Semiconducting silicide-Silicon contact and its scalability

Yan Wu*, Hiroyuki Hasegawa, Kuniyuki Kakushima, Kenji Ohmori, Takanobu Watanabe, Akira Nishiyama, Nobuyuki Sugii, Hitoshi Wakabayashi, Kazuo Tsutsui, Yoshinori Kataoka, Kenji Natori, Keisaku Yamada, Hiroshi Iwai

*この研究の対応する著者

研究成果: Article査読

18 被引用数 (Scopus)

抄録

A new type of silicon-based Tunneling FET (TFET) using semiconducting silicide Mg2Si/Si hetero-junction as source-channel structure is proposed and the device simulation has been presented. With narrow bandgap of silicide and the conduction and valence band discontinuous at the hetero-junction, larger drain current and smaller subthreshold swing than those of Si homo-junction TFET can be obtained. Structural optimization study reveals that low Si channel impurity concentration and the alignment of the gate electrode edge to the hetero-junction lead to better performance of the TFET. Scaling of the gate length increases the off-state leakage current, however, the drain voltage (Vd) reduction in accordance with the gate scaling suppresses the phenomenon, keeping its high drivability.

本文言語English
ページ(範囲)899-904
ページ数6
ジャーナルMicroelectronics Reliability
54
5
DOI
出版ステータスPublished - 2014 5

ASJC Scopus subject areas

  • 電子材料、光学材料、および磁性材料
  • 原子分子物理学および光学
  • 安全性、リスク、信頼性、品質管理
  • 凝縮系物理学
  • 表面、皮膜および薄膜
  • 電子工学および電気工学

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