A parallel algorithm for constructing binary decision diagrams

Shinji Kimura, Edmund M. Clarke

研究成果: Conference contribution

42 被引用数 (Scopus)

抄録

A parallel algorithm for constructing binary decision diagrams is described. The algorithms treats binary decision graphs as minimal finite automata. The automation for a Boolean fucntion with AND as its main operation (OR operation) is obtained by forming the intersection (union) of the regular sets associated with its operands. The union and intersection operations are implemented by a product construction on the minimal automata for the regular sets. After each product construction step the automaton must be reminimized. The parallel algorithm is designed so that it is possible to find the minimal representations for several Boolean operations in parallel. The level of each operation is determined. Operations at the same level can be performed in parallel without any communication between processors. If there are relatively few operations in one level, then the product generation step is divided into several suboperations and the results are merged.

本文言語English
ホスト出版物のタイトルProceedings - IEEE International Conference on Computer Design
ホスト出版物のサブタイトルVLSI in Computers and Processors
出版社Publ by IEEE
ページ220-223
ページ数4
ISBN(印刷版)O81862079X
出版ステータスPublished - 1990 9 1
外部発表はい
イベントProceedings of the 1990 IEEE International Conference on Computer Design: VLSI in Computers and Processors - ICCD '90 - Cambridge, MA, USA
継続期間: 1990 9 171990 9 19

出版物シリーズ

名前Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors

Other

OtherProceedings of the 1990 IEEE International Conference on Computer Design: VLSI in Computers and Processors - ICCD '90
CityCambridge, MA, USA
Period90/9/1790/9/19

ASJC Scopus subject areas

  • Hardware and Architecture
  • Electrical and Electronic Engineering

フィンガープリント 「A parallel algorithm for constructing binary decision diagrams」の研究トピックを掘り下げます。これらがまとまってユニークなフィンガープリントを構成します。

引用スタイル