A parallel routing method for fixed pins using virtual boundary

Ran Zhang, Takahiro Watanabe

研究成果: Conference contribution

1 被引用数 (Scopus)

抄録

In recent PCB systems, the routing for high speed board is still achieved manually. As IC technology advances rapidly, the dimensions of packages and PCBs are decreasing while the pin counts and routing layers keep increasing. In this research, a parallel routing method for fixed pins using virtual boundary is proposed, which partitions the routing area into several sub-areas and routes them separately. Applying this proposed method, the wire length can be reduced. Moreover, considering the length-matching constraints, especially for the isometric wires routing problems, the proposed method can get better wire shape resemblance.

本文言語English
ホスト出版物のタイトルIEEE 2013 Tencon - Spring, TENCONSpring 2013 - Conference Proceedings
ページ99-103
ページ数5
DOI
出版ステータスPublished - 2013 9 16
イベント2013 1st IEEE TENCON Spring Conference, TENCONSpring 2013 - Sydney, NSW, Australia
継続期間: 2013 4 172013 4 19

出版物シリーズ

名前IEEE 2013 Tencon - Spring, TENCONSpring 2013 - Conference Proceedings

Conference

Conference2013 1st IEEE TENCON Spring Conference, TENCONSpring 2013
CountryAustralia
CitySydney, NSW
Period13/4/1713/4/19

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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