Power and energy minimization has become a significant design requirement for many electronic systems nowadays. As a commonly used arithmetic unit, approximate multiplier is a desirable target for high-speed and low-power digital signal processing. This paper proposes a novel design based on radix-4 partial product generation method, which reduces the height of partial product to half. A new 4-2 compressor is also proposed under the consideration of hardware and accuracy performance for partial product accumulation. As a result, the proposed design for 8-bit multiplication achieves a reduction of power, area and delay up to 49.4%, 53.4% and 48.2% compared to the conventional accurate multiplier. Meanwhile, the accuracy and hardware performance of the proposed design are also compared with several previous works and shows its effectiveness. In addition, the proposed multiplier is also applied to image processing applications without compromising the overall image quality while the power consumption is dramatically reduced.