A retargeting methodology of nano-watt CMOS reference circuit based on advanced compact MOSFET model

Gong Chen, Bo Yang, Shigetoshi Nakatake, Zhangcai Huang, Yasuaki Inoue

    研究成果: Conference contribution

    抄録

    In retargeting of a nano-watt CMOS reference circuit, we adopt an advanced compact MOSFET model to describe the drain current consistently in strong and weak inversion levels. Based on this model, we describe all bias conditions in terms of ratios of the channel widths and lengths. Taking the effect of very long channels into account, we formulate the threshold voltage as a function of the drain-source voltage. Furthermore, we introduce a tuning parameter with the empirical range and fix all transistor sizes sweeping this parameter as well as applying a simulation. In case studies, we retargeted a circuit from the 180nm/1.8V process to the 90nm/1.2V, 2.5V, 3.3V processes. Besides, we fabricated the circuit in the 90nm/1.2V process, and confirmed the good measurement results such as less than 12.8%/V supply voltage variation and only 1.1nW power consumption.

    元の言語English
    ホスト出版物のタイトルISCAS 2012 - 2012 IEEE International Symposium on Circuits and Systems
    ページ938-941
    ページ数4
    DOI
    出版物ステータスPublished - 2012
    イベント2012 IEEE International Symposium on Circuits and Systems, ISCAS 2012 - Seoul
    継続期間: 2012 5 202012 5 23

    Other

    Other2012 IEEE International Symposium on Circuits and Systems, ISCAS 2012
    Seoul
    期間12/5/2012/5/23

    Fingerprint

    Networks (circuits)
    Drain current
    Electric potential
    Threshold voltage
    Transistors
    Electric power utilization
    Tuning

    ASJC Scopus subject areas

    • Hardware and Architecture
    • Electrical and Electronic Engineering

    これを引用

    Chen, G., Yang, B., Nakatake, S., Huang, Z., & Inoue, Y. (2012). A retargeting methodology of nano-watt CMOS reference circuit based on advanced compact MOSFET model. : ISCAS 2012 - 2012 IEEE International Symposium on Circuits and Systems (pp. 938-941). [6272199] https://doi.org/10.1109/ISCAS.2012.6272199

    A retargeting methodology of nano-watt CMOS reference circuit based on advanced compact MOSFET model. / Chen, Gong; Yang, Bo; Nakatake, Shigetoshi; Huang, Zhangcai; Inoue, Yasuaki.

    ISCAS 2012 - 2012 IEEE International Symposium on Circuits and Systems. 2012. p. 938-941 6272199.

    研究成果: Conference contribution

    Chen, G, Yang, B, Nakatake, S, Huang, Z & Inoue, Y 2012, A retargeting methodology of nano-watt CMOS reference circuit based on advanced compact MOSFET model. : ISCAS 2012 - 2012 IEEE International Symposium on Circuits and Systems., 6272199, pp. 938-941, 2012 IEEE International Symposium on Circuits and Systems, ISCAS 2012, Seoul, 12/5/20. https://doi.org/10.1109/ISCAS.2012.6272199
    Chen G, Yang B, Nakatake S, Huang Z, Inoue Y. A retargeting methodology of nano-watt CMOS reference circuit based on advanced compact MOSFET model. : ISCAS 2012 - 2012 IEEE International Symposium on Circuits and Systems. 2012. p. 938-941. 6272199 https://doi.org/10.1109/ISCAS.2012.6272199
    Chen, Gong ; Yang, Bo ; Nakatake, Shigetoshi ; Huang, Zhangcai ; Inoue, Yasuaki. / A retargeting methodology of nano-watt CMOS reference circuit based on advanced compact MOSFET model. ISCAS 2012 - 2012 IEEE International Symposium on Circuits and Systems. 2012. pp. 938-941
    @inproceedings{b7bda5b7891f4be0828e38b8a429b042,
    title = "A retargeting methodology of nano-watt CMOS reference circuit based on advanced compact MOSFET model",
    abstract = "In retargeting of a nano-watt CMOS reference circuit, we adopt an advanced compact MOSFET model to describe the drain current consistently in strong and weak inversion levels. Based on this model, we describe all bias conditions in terms of ratios of the channel widths and lengths. Taking the effect of very long channels into account, we formulate the threshold voltage as a function of the drain-source voltage. Furthermore, we introduce a tuning parameter with the empirical range and fix all transistor sizes sweeping this parameter as well as applying a simulation. In case studies, we retargeted a circuit from the 180nm/1.8V process to the 90nm/1.2V, 2.5V, 3.3V processes. Besides, we fabricated the circuit in the 90nm/1.2V process, and confirmed the good measurement results such as less than 12.8{\%}/V supply voltage variation and only 1.1nW power consumption.",
    author = "Gong Chen and Bo Yang and Shigetoshi Nakatake and Zhangcai Huang and Yasuaki Inoue",
    year = "2012",
    doi = "10.1109/ISCAS.2012.6272199",
    language = "English",
    pages = "938--941",
    booktitle = "ISCAS 2012 - 2012 IEEE International Symposium on Circuits and Systems",

    }

    TY - GEN

    T1 - A retargeting methodology of nano-watt CMOS reference circuit based on advanced compact MOSFET model

    AU - Chen, Gong

    AU - Yang, Bo

    AU - Nakatake, Shigetoshi

    AU - Huang, Zhangcai

    AU - Inoue, Yasuaki

    PY - 2012

    Y1 - 2012

    N2 - In retargeting of a nano-watt CMOS reference circuit, we adopt an advanced compact MOSFET model to describe the drain current consistently in strong and weak inversion levels. Based on this model, we describe all bias conditions in terms of ratios of the channel widths and lengths. Taking the effect of very long channels into account, we formulate the threshold voltage as a function of the drain-source voltage. Furthermore, we introduce a tuning parameter with the empirical range and fix all transistor sizes sweeping this parameter as well as applying a simulation. In case studies, we retargeted a circuit from the 180nm/1.8V process to the 90nm/1.2V, 2.5V, 3.3V processes. Besides, we fabricated the circuit in the 90nm/1.2V process, and confirmed the good measurement results such as less than 12.8%/V supply voltage variation and only 1.1nW power consumption.

    AB - In retargeting of a nano-watt CMOS reference circuit, we adopt an advanced compact MOSFET model to describe the drain current consistently in strong and weak inversion levels. Based on this model, we describe all bias conditions in terms of ratios of the channel widths and lengths. Taking the effect of very long channels into account, we formulate the threshold voltage as a function of the drain-source voltage. Furthermore, we introduce a tuning parameter with the empirical range and fix all transistor sizes sweeping this parameter as well as applying a simulation. In case studies, we retargeted a circuit from the 180nm/1.8V process to the 90nm/1.2V, 2.5V, 3.3V processes. Besides, we fabricated the circuit in the 90nm/1.2V process, and confirmed the good measurement results such as less than 12.8%/V supply voltage variation and only 1.1nW power consumption.

    UR - http://www.scopus.com/inward/record.url?scp=84866634521&partnerID=8YFLogxK

    UR - http://www.scopus.com/inward/citedby.url?scp=84866634521&partnerID=8YFLogxK

    U2 - 10.1109/ISCAS.2012.6272199

    DO - 10.1109/ISCAS.2012.6272199

    M3 - Conference contribution

    AN - SCOPUS:84866634521

    SP - 938

    EP - 941

    BT - ISCAS 2012 - 2012 IEEE International Symposium on Circuits and Systems

    ER -