A selective scan chain reconfiguration through run-length coding for test data compression and scan power reduction

Youhua Shi*, Shinji Kimura, Masao Yanagisawa, Tatsuo Ohtsuki

*この研究の対応する著者

研究成果: Article査読

抄録

Test data volume and power consumption for scan-based designs are two major concerns in system-on-a-chip testing. However, test set compaction by filling the don't-cares will invariably increase the scan-in power dissipation for scan testing, then the goals of test data reduction and low-power scan testing appear to be conflicted. Therefore, in this paper we present a selective scan chain reconfiguration method for test data compression and scan-in power reduction. The proposed method analyzes the compatibility of the internal scan cells for a given test set and then divides the scan cells into compatible classes. After the scan chain reconfiguration a dictionary is built to indicate the run-length of each compatible class and only the scan-in data for each class should be transferred from the ATE to the CUT so as to reduce test data volume. Experimental results for the larger ISCAS'89 benchmarks show that the proposed approach overcomes the limitations of traditional run-length coding techniques, and leads to highly reduced test data volume with significant power savings during scan testing in all cases.

本文言語English
ページ(範囲)3208-3214
ページ数7
ジャーナルIEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
E87-A
12
出版ステータスPublished - 2004 12月

ASJC Scopus subject areas

  • 信号処理
  • コンピュータ グラフィックスおよびコンピュータ支援設計
  • 電子工学および電気工学
  • 応用数学

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