A selector-based FFT processor and its FPGA implementation

    研究成果: Conference contribution

    抄録

    Fast Fourier transform (FFT) is used in various applications such as signal processings and developing a high-speed FFT processor is quite required. In this paper, we propose a high-speed FFT processor based on selector logics. The selector-based FFT processor is constructed by focusing on the subtract-multiplication operations and partly applying selector logics to them. Furthermore, we implement the selector-based FFT processor on a Xilinx FPGA. Experimental results show that our proposed FFT processor can improve the processing speed by up to 21% and also reduce the number of LUTs by up to 33% compared with a naive FFT processor.

    元の言語English
    ホスト出版物のタイトルProceedings - International SoC Design Conference 2017, ISOCC 2017
    出版者Institute of Electrical and Electronics Engineers Inc.
    ページ88-89
    ページ数2
    ISBN(電子版)9781538622858
    DOI
    出版物ステータスPublished - 2018 5 29
    イベント14th International SoC Design Conference, ISOCC 2017 - Seoul, Korea, Republic of
    継続期間: 2017 11 52017 11 8

    Other

    Other14th International SoC Design Conference, ISOCC 2017
    Korea, Republic of
    Seoul
    期間17/11/517/11/8

    Fingerprint

    Fast Fourier transforms
    Field programmable gate arrays (FPGA)
    Signal processing
    Processing

    ASJC Scopus subject areas

    • Hardware and Architecture
    • Electrical and Electronic Engineering
    • Electronic, Optical and Magnetic Materials

    これを引用

    Hirai, Y., Kawamura, K., Yanagisawa, M., & Togawa, N. (2018). A selector-based FFT processor and its FPGA implementation. : Proceedings - International SoC Design Conference 2017, ISOCC 2017 (pp. 88-89). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ISOCC.2017.8368783

    A selector-based FFT processor and its FPGA implementation. / Hirai, Yuya; Kawamura, Kazushi; Yanagisawa, Masao; Togawa, Nozomu.

    Proceedings - International SoC Design Conference 2017, ISOCC 2017. Institute of Electrical and Electronics Engineers Inc., 2018. p. 88-89.

    研究成果: Conference contribution

    Hirai, Y, Kawamura, K, Yanagisawa, M & Togawa, N 2018, A selector-based FFT processor and its FPGA implementation. : Proceedings - International SoC Design Conference 2017, ISOCC 2017. Institute of Electrical and Electronics Engineers Inc., pp. 88-89, 14th International SoC Design Conference, ISOCC 2017, Seoul, Korea, Republic of, 17/11/5. https://doi.org/10.1109/ISOCC.2017.8368783
    Hirai Y, Kawamura K, Yanagisawa M, Togawa N. A selector-based FFT processor and its FPGA implementation. : Proceedings - International SoC Design Conference 2017, ISOCC 2017. Institute of Electrical and Electronics Engineers Inc. 2018. p. 88-89 https://doi.org/10.1109/ISOCC.2017.8368783
    Hirai, Yuya ; Kawamura, Kazushi ; Yanagisawa, Masao ; Togawa, Nozomu. / A selector-based FFT processor and its FPGA implementation. Proceedings - International SoC Design Conference 2017, ISOCC 2017. Institute of Electrical and Electronics Engineers Inc., 2018. pp. 88-89
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