A simultaneous technology mapping, placement, and global routing algorithm for fpgas with path delay constraints

Mathematics

• Field Programmable Gate Array 100%
• Routing Algorithm 90%
• Placement 73%
• Routing 49%
• Path 43%
• Maple 30%
• Critical Path 28%
• Logic 28%
• Partitioning 18%
• Simultaneity 14%
• Algorithm Design 12%
• Lower bound 11%
• Surjection 11%
• Layout 10%
• Experimental Results 9%
• Benchmark 8%
• Upper bound 5%

Engineering & Materials Science

• Routing algorithms 64%
• Field programmable gate arrays (FPGA) 20%
• Networks (circuits) 13%