A standard cell optimization method for near-threshold voltage operations

Masahiro Kondo; Shinichi Nishizawa; Tohru Ishihara; Hidetoshi Onodera

doi:10.1007/978-3-642-36157-9_4

A standard cell optimization method for near-threshold voltage operations

Masahiro Kondo, Shinichi Nishizawa, Tohru Ishihara, Hidetoshi Onodera

研究成果: Conference contribution

2 被引用数 (Scopus)

抄録

Near-threshold voltage operation is a well-known solution for drastically improving the energy efficiency of microprocessors fabricated with the latest process technologies. However, it is not well studied how the optimal gate size of standard cells changes when the supply voltage of the microprocessors gets closer to the threshold voltage. This paper first shows an experimental observation that the optimal gate size for nearthreshold voltage which is 0.6V in this work is far from the optimal gate size for the nominal supply voltage which is 1.2V in our target process technology. Based on this fact, the paper next presents our cell optimization flow which finds the optimal gate sizes of individual standard cells operating at the near-threshold voltage. The experimental results show that, when operating at the 0.6V condition, the energy consumptions of several benchmark circuits synthesized with our standard cells optimized for the 0.6V condition can be reduced by 31% at the best case and by 23% on average compared with those of the same circuits synthesized with the cells optimized for the nominal supply voltage.

本文言語	English
ホスト出版物のタイトル	Integrated Circuit and System Design
ホスト出版物のサブタイトル	Power and Timing Modeling, Optimization and Simulation - 22nd International Workshop, PATMOS 2012, Revised Selected Papers
ページ	32-41
ページ数	10
DOI	https://doi.org/10.1007/978-3-642-36157-9_4
出版ステータス	Published - 2013
外部発表	はい
イベント	22nd International Workshop on Power and Timing Modeling, Optimization and Simulation, PATMOS 2012 - Newcastle upon Tyne, United Kingdom 継続期間: 2012 9月 4 → 2012 9月 6

出版物シリーズ

名前	Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
巻	7606 LNCS
ISSN（印刷版）	0302-9743
ISSN（電子版）	1611-3349

Conference

Conference	22nd International Workshop on Power and Timing Modeling, Optimization and Simulation, PATMOS 2012
国/地域	United Kingdom
City	Newcastle upon Tyne
Period	12/9/4 → 12/9/6

ASJC Scopus subject areas

理論的コンピュータサイエンス
コンピュータサイエンス（全般）

UN SDG

この成果は、次の持続可能な開発目標に貢献しています

文献へのアクセス

10.1007/978-3-642-36157-9_4

他のファイルとリンク

引用スタイル

Kondo, M., Nishizawa, S., Ishihara, T., & Onodera, H. (2013). A standard cell optimization method for near-threshold voltage operations. In Integrated Circuit and System Design: Power and Timing Modeling, Optimization and Simulation - 22nd International Workshop, PATMOS 2012, Revised Selected Papers (pp. 32-41). (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); Vol. 7606 LNCS). https://doi.org/10.1007/978-3-642-36157-9_4

A standard cell optimization method for near-threshold voltage operations. / Kondo, Masahiro; Nishizawa, Shinichi; Ishihara, Tohru その他.

Integrated Circuit and System Design: Power and Timing Modeling, Optimization and Simulation - 22nd International Workshop, PATMOS 2012, Revised Selected Papers. 2013. p. 32-41 (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); Vol. 7606 LNCS).

研究成果: Conference contribution

Kondo, M, Nishizawa, S, Ishihara, T & Onodera, H 2013, A standard cell optimization method for near-threshold voltage operations. in Integrated Circuit and System Design: Power and Timing Modeling, Optimization and Simulation - 22nd International Workshop, PATMOS 2012, Revised Selected Papers. Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), vol. 7606 LNCS, pp. 32-41, 22nd International Workshop on Power and Timing Modeling, Optimization and Simulation, PATMOS 2012, Newcastle upon Tyne, United Kingdom, 12/9/4. https://doi.org/10.1007/978-3-642-36157-9_4

Kondo M, Nishizawa S, Ishihara T, Onodera H. A standard cell optimization method for near-threshold voltage operations. In Integrated Circuit and System Design: Power and Timing Modeling, Optimization and Simulation - 22nd International Workshop, PATMOS 2012, Revised Selected Papers. 2013. p. 32-41. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)). doi: 10.1007/978-3-642-36157-9_4

Kondo, Masahiro ; Nishizawa, Shinichi ; Ishihara, Tohru その他. / A standard cell optimization method for near-threshold voltage operations. Integrated Circuit and System Design: Power and Timing Modeling, Optimization and Simulation - 22nd International Workshop, PATMOS 2012, Revised Selected Papers. 2013. pp. 32-41 (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)).

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A standard cell optimization method for near-threshold voltage operations

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出版物シリーズ

Conference

ASJC Scopus subject areas

UN SDG

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