A sub-1-V low-voltage low-power voltage referencewith a back-gate connection MOSFET

Jun Pan*, Yasuaki Inoue

*この研究の対応する著者

    研究成果: Conference contribution

    5 被引用数 (Scopus)

    抄録

    A sub-1-V self-biased low-voltage low-power voltage reference is presented for micropower electronic applications. And the proposed circuit has very low temperature dependence by using a back-gate connection MOSFET. An Hspice simulation shows that the reference voltage and total power dissipation are 181 mV and 1.1 μW, respectively. The temperature coefficient of the reference voltage is 33 ppm/°C within a temperature range from -40 to 100°C. The supply voltage dependence is -0.36 m V/V (Vdd=0.95-3.3 V). Supply voltage can be as low as 0.95 V in a standard CMOS 0.35 °m technology with threshold voltages of about 0.5 V and -0.65 V for n-channel and p-channel MOSFETs, respectively.

    本文言語English
    ホスト出版物のタイトル2006 International Conference on Communications, Circuits and Systems, ICCCAS, Proceedings
    ページ2314-2318
    ページ数5
    4
    DOI
    出版ステータスPublished - 2006
    イベント2006 International Conference on Communications, Circuits and Systems, ICCCAS - Guilin
    継続期間: 2006 6 252006 6 28

    Other

    Other2006 International Conference on Communications, Circuits and Systems, ICCCAS
    CityGuilin
    Period06/6/2506/6/28

    ASJC Scopus subject areas

    • 電子工学および電気工学

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