A variability-aware adaptive test flow for test quality improvement

Michihiro Shintani*, Takumi Uezono, Tomoyuki Takahashi, Kazumi Hatayama, Takashi Aikyo, Kazuya Masu, Takashi Sato

*この研究の対応する著者

研究成果: Article査読

17 被引用数 (Scopus)

抄録

In this paper, we propose a process-variability-aware adaptive test flow that realizes efficient and comprehensive detection of parametric faults. A parametric fault is essentially a malfunction in a large-scale integration chip, which is caused by the variability in fabrication processes. In our adaptive test framework, test pattern sets are altered on individual chips in order to apply the optimal set of test patterns for each chip, and thus the test coverage is improved and the test time is reduced. The test pattern is chosen on the basis of parameter estimations measured using an on-chip sensor with respect to statistical timing information. We also propose a novel metric to quantize the test coverage suitable for evaluating the test quality of parametric faults. Our experimental results using an industrial design show that the proposed flow significantly improves the parametric fault coverage and test efficiency compared to conventional test flows.

本文言語English
論文番号6835147
ページ(範囲)1056-1066
ページ数11
ジャーナルIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
33
7
DOI
出版ステータスPublished - 2014 7月 1
外部発表はい

ASJC Scopus subject areas

  • ソフトウェア
  • コンピュータ グラフィックスおよびコンピュータ支援設計
  • 電子工学および電気工学

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