Accuracy-configurable low-power approximate floating-point multiplier based on mantissa bit segmentation

Jie Li, Yi Guo, Shinji Kimura

研究成果: Conference contribution

抄録

Nowadays, in energy-efficient design of digital systems, approximate computing (AC) has an increasingly important role. Due to human perceptual limitations, redundancy in input data and so on, there is a huge amount of applications that can tolerate errors. In this paper, an accuracy-configurable approximate floating-point (FP) multiplier is proposed to improve hardware consumption for such applications. Mantissa is divided into a short exactly processed part and a remaining approximately processed part. A new addition and shifting method is applied to the approximate part to replace multiplication to improve hardware performance. Experimental results show the 4-bit exact part configuration of the proposed work ensures the accuracy of 99.17% (MRED is 0.83%) with the reduction 67.65% of area, 16.64% of delay and 75.62% of power. The proposed work also shows good performance in image processing and neural networks.

本文言語English
ホスト出版物のタイトル2020 IEEE Region 10 Conference, TENCON 2020
出版社Institute of Electrical and Electronics Engineers Inc.
ページ1311-1316
ページ数6
ISBN(電子版)9781728184555
DOI
出版ステータスPublished - 2020 11 16
イベント2020 IEEE Region 10 Conference, TENCON 2020 - Virtual, Osaka, Japan
継続期間: 2020 11 162020 11 19

出版物シリーズ

名前IEEE Region 10 Annual International Conference, Proceedings/TENCON
2020-November
ISSN(印刷版)2159-3442
ISSN(電子版)2159-3450

Conference

Conference2020 IEEE Region 10 Conference, TENCON 2020
国/地域Japan
CityVirtual, Osaka
Period20/11/1620/11/19

ASJC Scopus subject areas

  • コンピュータ サイエンスの応用
  • 電子工学および電気工学

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