Accurate measurement of sneak current in reram crossbar array with data storage pattern dependencies

Yaqi Shang, Takashi Ohsawa

研究成果: Conference contribution

抜粋

In this paper, readout scheme in ReRAM crossbar array based on sneak current compensation is introduced. This scheme consists of two cycles. In the first measurement cycle, an accurate sneak current is measured which is dependent on the data storage patterns of the crossbar arrays in which the selector ON/OFF ratio is not large enough. In the second cycle, the measured sneak current is subtracted from the total bit line current to predict the cell current accurately. To make the measured sneak current accurate, the crossbar array is divided into many blocks only in one direction so that the impact of array size increase is minimal. The scheme is validated by using HSPICE.

元の言語English
ホスト出版物のタイトル2019 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2019
出版者Institute of Electrical and Electronics Engineers Inc.
ISBN(電子版)9781728109428
DOI
出版物ステータスPublished - 2019 4
イベント2019 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2019 - Hsinchu, Taiwan, Province of China
継続期間: 2019 4 222019 4 25

出版物シリーズ

名前2019 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2019

Conference

Conference2019 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2019
Taiwan, Province of China
Hsinchu
期間19/4/2219/4/25

ASJC Scopus subject areas

  • Hardware and Architecture
  • Electrical and Electronic Engineering
  • Electronic, Optical and Magnetic Materials

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  • これを引用

    Shang, Y., & Ohsawa, T. (2019). Accurate measurement of sneak current in reram crossbar array with data storage pattern dependencies. : 2019 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2019 [8804668] (2019 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2019). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/VLSI-TSA.2019.8804668