Accurate method for calculating the effective capacitance with rc loads based on the thevenin model

Minglu Jiang, Zhangcai Huang, Atsushi Kurokawa, Shuai Fang, Yasuaki Inoue

    研究成果: Article

    2 引用 (Scopus)

    抄録

    In deep submicron designs, predicting gate delays with interconnect load is a noteworthy work for Static Timing Analysis (STA). The effective capacitance Ceff concept and the Thevenin model that replaces the gate with a linear resistor and a voltage source are usually used to calculate the delay of gate with interconnect load. In conventional methods, it is not considered that the charges transferred into interconnect load and Ceff in the Thevenin model are not equal. The charge difference between interconnect load and Ceff has the large influence to the accuracy of computing C eff. In this paper, an advanced effective capacitance model is proposed to consider the above problem in the Thevenin model, where the influence of the charge difference is modeled as one part of the effective capacitance to compute the gate delay. Experimental results show a significant improvement in accuracy when the charge difference between interconnect load and Ceff is considered.

    元の言語English
    ページ(範囲)2531-2539
    ページ数9
    ジャーナルIEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
    E92-A
    発行部数10
    DOI
    出版物ステータスPublished - 2009 10

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    Interconnect
    Capacitance
    Charge
    Timing Analysis
    Model
    Resistors
    Static Analysis
    Voltage
    Electric potential
    Calculate
    Computing
    Experimental Results
    Influence

    ASJC Scopus subject areas

    • Electrical and Electronic Engineering
    • Computer Graphics and Computer-Aided Design
    • Applied Mathematics
    • Signal Processing

    これを引用

    Accurate method for calculating the effective capacitance with rc loads based on the thevenin model. / Jiang, Minglu; Huang, Zhangcai; Kurokawa, Atsushi; Fang, Shuai; Inoue, Yasuaki.

    :: IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, 巻 E92-A, 番号 10, 10.2009, p. 2531-2539.

    研究成果: Article

    Jiang, Minglu ; Huang, Zhangcai ; Kurokawa, Atsushi ; Fang, Shuai ; Inoue, Yasuaki. / Accurate method for calculating the effective capacitance with rc loads based on the thevenin model. :: IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences. 2009 ; 巻 E92-A, 番号 10. pp. 2531-2539.
    @article{1d5ae2cc4c5549ab80313bcaa58d4627,
    title = "Accurate method for calculating the effective capacitance with rc loads based on the thevenin model",
    abstract = "In deep submicron designs, predicting gate delays with interconnect load is a noteworthy work for Static Timing Analysis (STA). The effective capacitance Ceff concept and the Thevenin model that replaces the gate with a linear resistor and a voltage source are usually used to calculate the delay of gate with interconnect load. In conventional methods, it is not considered that the charges transferred into interconnect load and Ceff in the Thevenin model are not equal. The charge difference between interconnect load and Ceff has the large influence to the accuracy of computing C eff. In this paper, an advanced effective capacitance model is proposed to consider the above problem in the Thevenin model, where the influence of the charge difference is modeled as one part of the effective capacitance to compute the gate delay. Experimental results show a significant improvement in accuracy when the charge difference between interconnect load and Ceff is considered.",
    keywords = "Effective capacitance, Gate delay, Static timing analysis, Thevenin model",
    author = "Minglu Jiang and Zhangcai Huang and Atsushi Kurokawa and Shuai Fang and Yasuaki Inoue",
    year = "2009",
    month = "10",
    doi = "10.1587/transfun.E92.A.2531",
    language = "English",
    volume = "E92-A",
    pages = "2531--2539",
    journal = "IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences",
    issn = "0916-8508",
    publisher = "Maruzen Co., Ltd/Maruzen Kabushikikaisha",
    number = "10",

    }

    TY - JOUR

    T1 - Accurate method for calculating the effective capacitance with rc loads based on the thevenin model

    AU - Jiang, Minglu

    AU - Huang, Zhangcai

    AU - Kurokawa, Atsushi

    AU - Fang, Shuai

    AU - Inoue, Yasuaki

    PY - 2009/10

    Y1 - 2009/10

    N2 - In deep submicron designs, predicting gate delays with interconnect load is a noteworthy work for Static Timing Analysis (STA). The effective capacitance Ceff concept and the Thevenin model that replaces the gate with a linear resistor and a voltage source are usually used to calculate the delay of gate with interconnect load. In conventional methods, it is not considered that the charges transferred into interconnect load and Ceff in the Thevenin model are not equal. The charge difference between interconnect load and Ceff has the large influence to the accuracy of computing C eff. In this paper, an advanced effective capacitance model is proposed to consider the above problem in the Thevenin model, where the influence of the charge difference is modeled as one part of the effective capacitance to compute the gate delay. Experimental results show a significant improvement in accuracy when the charge difference between interconnect load and Ceff is considered.

    AB - In deep submicron designs, predicting gate delays with interconnect load is a noteworthy work for Static Timing Analysis (STA). The effective capacitance Ceff concept and the Thevenin model that replaces the gate with a linear resistor and a voltage source are usually used to calculate the delay of gate with interconnect load. In conventional methods, it is not considered that the charges transferred into interconnect load and Ceff in the Thevenin model are not equal. The charge difference between interconnect load and Ceff has the large influence to the accuracy of computing C eff. In this paper, an advanced effective capacitance model is proposed to consider the above problem in the Thevenin model, where the influence of the charge difference is modeled as one part of the effective capacitance to compute the gate delay. Experimental results show a significant improvement in accuracy when the charge difference between interconnect load and Ceff is considered.

    KW - Effective capacitance

    KW - Gate delay

    KW - Static timing analysis

    KW - Thevenin model

    UR - http://www.scopus.com/inward/record.url?scp=78249284305&partnerID=8YFLogxK

    UR - http://www.scopus.com/inward/citedby.url?scp=78249284305&partnerID=8YFLogxK

    U2 - 10.1587/transfun.E92.A.2531

    DO - 10.1587/transfun.E92.A.2531

    M3 - Article

    AN - SCOPUS:78249284305

    VL - E92-A

    SP - 2531

    EP - 2539

    JO - IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences

    JF - IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences

    SN - 0916-8508

    IS - 10

    ER -