An 80-106 GHz CMOS amplifier with 0.5V supply voltage

K. Katayama, S. Amakawa, K. Takano, T. Yoshida, M. Fujishima, K. Hisamitsu, H. Takatsuka

研究成果: Conference contribution

7 被引用数 (Scopus)

抄録

A low-power CMOS W-band amplifier that feeds on a 0.5-V supply is presented. It achieves a peak gain of 24.1 dB and consumes 12mW. This was made possible by (a) the use of Mie Fujitsu Semiconductor 55-nm CMOS technology with deeply depleted channel (DDC) MOSFETs, which are meant specifically for ultralow-power designs with sub-1V supply voltage, (b) high-fmax transistor layout, which gives about 1 dB higher gain in the W-band than the ordinary layout, and (c) single-ended negative-capacitance feedback technique, which gives wideband gain boosting comparable to its differential counterpart (with cross-coupled feedback capacitors) with half the power consumption of the latter.

本文言語English
ホスト出版物のタイトルRFIC 2017 - Proceedings of the 2017 IEEE Radio Frequency Integrated Circuits Symposium
編集者Andre Hanke, Srenik Mehta
出版社Institute of Electrical and Electronics Engineers Inc.
ページ308-311
ページ数4
ISBN(電子版)9781509046263
DOI
出版ステータスPublished - 2017 7 5
外部発表はい
イベント2017 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2017 - Honolulu, United States
継続期間: 2017 6 42017 6 6

出版物シリーズ

名前Digest of Papers - IEEE Radio Frequency Integrated Circuits Symposium
ISSN(印刷版)1529-2517

Other

Other2017 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2017
国/地域United States
CityHonolulu
Period17/6/417/6/6

ASJC Scopus subject areas

  • 工学(全般)

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