An analytical model of the overshooting effect for multiple-input gates in nanometer technologies

Li Ding, Jing Wang, Zhangcai Huang, Atsushi Kurokawa, Yasuaki Inoue

    研究成果: Conference contribution

    抄録

    The overshooting effect, which is induced by the input-to-output coupling capacitance, has an significant effect on CMOS gate delay with the scaling of CMOS technology. In this paper, an effective analytical model is proposed to calculate the overshooting time of multiple-input gates. The proposed model is verified having a good agreement with SPICE simulation results.

    本文言語English
    ホスト出版物のタイトルProceedings - IEEE International Symposium on Circuits and Systems
    ページ1712-1715
    ページ数4
    DOI
    出版ステータスPublished - 2013
    イベント2013 IEEE International Symposium on Circuits and Systems, ISCAS 2013 - Beijing
    継続期間: 2013 5 192013 5 23

    Other

    Other2013 IEEE International Symposium on Circuits and Systems, ISCAS 2013
    CityBeijing
    Period13/5/1913/5/23

    ASJC Scopus subject areas

    • Electrical and Electronic Engineering

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