抄録
Network-on-Chips (NoC) has been proven as a flexible solution for Chip-Multiprocessor (CMP) systems due to its reusability and scalability. To increase communication efficiency, Three-Dimensional Networks-on-Chips (3D NoCs) are developed, which can shorten the wire length and improve the system performance. In this paper, we present a novel deadlock-free adaptive routing algorithm for 3D mesh NoC interconnections. The routing rules of traditional XY routing and YX routing are relaxed and used for intra-layer routing. Via multiple layers, balanced adaptiveness can be achieved. We detail the basic principle of this method and test its efficiency through simulations.
本文言語 | English |
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ホスト出版物のタイトル | Proceedings - IEEE 11th International Symposium on Embedded Multicore/Many-Core Systems-on-Chip, MCSoC 2017 |
出版社 | Institute of Electrical and Electronics Engineers Inc. |
ページ | 29-36 |
ページ数 | 8 |
巻 | 2018-January |
ISBN(電子版) | 9781538634417 |
DOI | |
出版ステータス | Published - 2018 3 26 |
イベント | 11th IEEE International Symposium on Embedded Multicore/Many-Core Systems-on-Chip, MCSoC 2017 - Seoul, Korea, Republic of 継続期間: 2017 9 18 → 2017 9 20 |
Other
Other | 11th IEEE International Symposium on Embedded Multicore/Many-Core Systems-on-Chip, MCSoC 2017 |
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Country | Korea, Republic of |
City | Seoul |
Period | 17/9/18 → 17/9/20 |
ASJC Scopus subject areas
- Safety, Risk, Reliability and Quality
- Hardware and Architecture
- Signal Processing