An efficient deadlock-free adaptive routing algorithm for 3D network-on-chips

Jindun Dai, Xin Jiang, Renjie Li, Takahiro Watanabe

研究成果: Conference contribution

1 引用 (Scopus)

抜粋

Network-on-Chips (NoC) has been proven as a flexible solution for Chip-Multiprocessor (CMP) systems due to its reusability and scalability. To increase communication efficiency, Three-Dimensional Networks-on-Chips (3D NoCs) are developed, which can shorten the wire length and improve the system performance. In this paper, we present a novel deadlock-free adaptive routing algorithm for 3D mesh NoC interconnections. The routing rules of traditional XY routing and YX routing are relaxed and used for intra-layer routing. Via multiple layers, balanced adaptiveness can be achieved. We detail the basic principle of this method and test its efficiency through simulations.

元の言語English
ホスト出版物のタイトルProceedings - IEEE 11th International Symposium on Embedded Multicore/Many-Core Systems-on-Chip, MCSoC 2017
出版者Institute of Electrical and Electronics Engineers Inc.
ページ29-36
ページ数8
2018-January
ISBN(電子版)9781538634417
DOI
出版物ステータスPublished - 2018 3 26
イベント11th IEEE International Symposium on Embedded Multicore/Many-Core Systems-on-Chip, MCSoC 2017 - Seoul, Korea, Republic of
継続期間: 2017 9 182017 9 20

Other

Other11th IEEE International Symposium on Embedded Multicore/Many-Core Systems-on-Chip, MCSoC 2017
Korea, Republic of
Seoul
期間17/9/1817/9/20

    フィンガープリント

ASJC Scopus subject areas

  • Safety, Risk, Reliability and Quality
  • Hardware and Architecture
  • Signal Processing

これを引用

Dai, J., Jiang, X., Li, R., & Watanabe, T. (2018). An efficient deadlock-free adaptive routing algorithm for 3D network-on-chips. : Proceedings - IEEE 11th International Symposium on Embedded Multicore/Many-Core Systems-on-Chip, MCSoC 2017 (巻 2018-January, pp. 29-36). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/MCSoC.2017.10