An impact of process variation on supply voltage dependence of logic path delay variation

Shinichi Nishizawa, Tohru Ishihara, Hidetoshi Onodera

研究成果: Conference contribution

1 被引用数 (Scopus)

抄録

Dynamic Voltage and Frequency Scaling (DVFS) technique requires accurate observation of critical path delay for robust operation under aggressive supply voltage scaling. Logic paths contain several types of logic gates and path delay have voltage dependences because different logic gates have different voltage dependences. However, it is not well investigated that how the voltage dependence of the path delay changes induced by process variation. This paper describes the effect of the process variation on the voltage dependence of path delay. Ring Oscillator circuits fabricated in 65-nm CMOS process are used for the evaluation and analysis of the process variation dependence of the voltage delay curves.

本文言語English
ホスト出版物のタイトル2015 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2015
出版社Institute of Electrical and Electronics Engineers Inc.
ISBN(電子版)9781479962754
DOI
出版ステータスPublished - 2015 5月 28
外部発表はい
イベント2015 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2015 - Hsinchu, Taiwan, Province of China
継続期間: 2015 4月 272015 4月 29

出版物シリーズ

名前2015 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2015

Conference

Conference2015 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2015
国/地域Taiwan, Province of China
CityHsinchu
Period15/4/2715/4/29

ASJC Scopus subject areas

  • ハードウェアとアーキテクチャ
  • 電子工学および電気工学

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