TY - GEN
T1 - An impact of process variation on supply voltage dependence of logic path delay variation
AU - Nishizawa, Shinichi
AU - Ishihara, Tohru
AU - Onodera, Hidetoshi
N1 - Publisher Copyright:
© 2015 IEEE.
PY - 2015/5/28
Y1 - 2015/5/28
N2 - Dynamic Voltage and Frequency Scaling (DVFS) technique requires accurate observation of critical path delay for robust operation under aggressive supply voltage scaling. Logic paths contain several types of logic gates and path delay have voltage dependences because different logic gates have different voltage dependences. However, it is not well investigated that how the voltage dependence of the path delay changes induced by process variation. This paper describes the effect of the process variation on the voltage dependence of path delay. Ring Oscillator circuits fabricated in 65-nm CMOS process are used for the evaluation and analysis of the process variation dependence of the voltage delay curves.
AB - Dynamic Voltage and Frequency Scaling (DVFS) technique requires accurate observation of critical path delay for robust operation under aggressive supply voltage scaling. Logic paths contain several types of logic gates and path delay have voltage dependences because different logic gates have different voltage dependences. However, it is not well investigated that how the voltage dependence of the path delay changes induced by process variation. This paper describes the effect of the process variation on the voltage dependence of path delay. Ring Oscillator circuits fabricated in 65-nm CMOS process are used for the evaluation and analysis of the process variation dependence of the voltage delay curves.
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U2 - 10.1109/VLSI-DAT.2015.7114534
DO - 10.1109/VLSI-DAT.2015.7114534
M3 - Conference contribution
AN - SCOPUS:84936980696
T3 - 2015 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2015
BT - 2015 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2015
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 2015 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2015
Y2 - 27 April 2015 through 29 April 2015
ER -