An interface-circuit synthesis method with configurable processor core in IP-based SoC designs

Shunitsu Kohara, Naoki Tomono, Jumpei Uchida, Yuichiro Miyaoka, Nozomu Togawa, Masao Yanagisawa, Tatsuo Ohtsuki

    研究成果: Conference contribution

    1 引用 (Scopus)

    抄録

    In SoC designs, efficient communication between the hardware IPs and the on-chip processor becomes very important, however the interface is usually affacted by the processor core specification. Thus in this paper, we focus on developing an efficient interface circuit architecture for the communications between the on-chip processor and embedded hardware IP cores. we also propose a method to synthesize it. Experimental results show that our method could obtain optimal interface circuits and works well through designing a MPEG-4 encode application.

    元の言語English
    ホスト出版物のタイトルProceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC
    ページ594-599
    ページ数6
    2006
    出版物ステータスPublished - 2006
    イベントASP-DAC 2006: Asia and South Pacific Design Automation Conference 2006 - Yokohama
    継続期間: 2006 1 242006 1 27

    Other

    OtherASP-DAC 2006: Asia and South Pacific Design Automation Conference 2006
    Yokohama
    期間06/1/2406/1/27

    Fingerprint

    Hardware
    Networks (circuits)
    Communication
    Specifications
    System-on-chip
    Intellectual property core

    ASJC Scopus subject areas

    • Engineering(all)

    これを引用

    Kohara, S., Tomono, N., Uchida, J., Miyaoka, Y., Togawa, N., Yanagisawa, M., & Ohtsuki, T. (2006). An interface-circuit synthesis method with configurable processor core in IP-based SoC designs. : Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC (巻 2006, pp. 594-599). [1594750]

    An interface-circuit synthesis method with configurable processor core in IP-based SoC designs. / Kohara, Shunitsu; Tomono, Naoki; Uchida, Jumpei; Miyaoka, Yuichiro; Togawa, Nozomu; Yanagisawa, Masao; Ohtsuki, Tatsuo.

    Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC. 巻 2006 2006. p. 594-599 1594750.

    研究成果: Conference contribution

    Kohara, S, Tomono, N, Uchida, J, Miyaoka, Y, Togawa, N, Yanagisawa, M & Ohtsuki, T 2006, An interface-circuit synthesis method with configurable processor core in IP-based SoC designs. : Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC. 巻. 2006, 1594750, pp. 594-599, ASP-DAC 2006: Asia and South Pacific Design Automation Conference 2006, Yokohama, 06/1/24.
    Kohara S, Tomono N, Uchida J, Miyaoka Y, Togawa N, Yanagisawa M その他. An interface-circuit synthesis method with configurable processor core in IP-based SoC designs. : Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC. 巻 2006. 2006. p. 594-599. 1594750
    Kohara, Shunitsu ; Tomono, Naoki ; Uchida, Jumpei ; Miyaoka, Yuichiro ; Togawa, Nozomu ; Yanagisawa, Masao ; Ohtsuki, Tatsuo. / An interface-circuit synthesis method with configurable processor core in IP-based SoC designs. Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC. 巻 2006 2006. pp. 594-599
    @inproceedings{ce7419b345f3487a8bd870936f702832,
    title = "An interface-circuit synthesis method with configurable processor core in IP-based SoC designs",
    abstract = "In SoC designs, efficient communication between the hardware IPs and the on-chip processor becomes very important, however the interface is usually affacted by the processor core specification. Thus in this paper, we focus on developing an efficient interface circuit architecture for the communications between the on-chip processor and embedded hardware IP cores. we also propose a method to synthesize it. Experimental results show that our method could obtain optimal interface circuits and works well through designing a MPEG-4 encode application.",
    author = "Shunitsu Kohara and Naoki Tomono and Jumpei Uchida and Yuichiro Miyaoka and Nozomu Togawa and Masao Yanagisawa and Tatsuo Ohtsuki",
    year = "2006",
    language = "English",
    isbn = "0780394518",
    volume = "2006",
    pages = "594--599",
    booktitle = "Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC",

    }

    TY - GEN

    T1 - An interface-circuit synthesis method with configurable processor core in IP-based SoC designs

    AU - Kohara, Shunitsu

    AU - Tomono, Naoki

    AU - Uchida, Jumpei

    AU - Miyaoka, Yuichiro

    AU - Togawa, Nozomu

    AU - Yanagisawa, Masao

    AU - Ohtsuki, Tatsuo

    PY - 2006

    Y1 - 2006

    N2 - In SoC designs, efficient communication between the hardware IPs and the on-chip processor becomes very important, however the interface is usually affacted by the processor core specification. Thus in this paper, we focus on developing an efficient interface circuit architecture for the communications between the on-chip processor and embedded hardware IP cores. we also propose a method to synthesize it. Experimental results show that our method could obtain optimal interface circuits and works well through designing a MPEG-4 encode application.

    AB - In SoC designs, efficient communication between the hardware IPs and the on-chip processor becomes very important, however the interface is usually affacted by the processor core specification. Thus in this paper, we focus on developing an efficient interface circuit architecture for the communications between the on-chip processor and embedded hardware IP cores. we also propose a method to synthesize it. Experimental results show that our method could obtain optimal interface circuits and works well through designing a MPEG-4 encode application.

    UR - http://www.scopus.com/inward/record.url?scp=33748606345&partnerID=8YFLogxK

    UR - http://www.scopus.com/inward/citedby.url?scp=33748606345&partnerID=8YFLogxK

    M3 - Conference contribution

    AN - SCOPUS:33748606345

    SN - 0780394518

    SN - 9780780394513

    VL - 2006

    SP - 594

    EP - 599

    BT - Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC

    ER -