An ultra-low complexity motion estimation algorithm and its implementation of specific processor

Seiichiro Hiratsuka*, Satoshi Goto, Takeshi Ikenaga

*この研究の対応する著者

研究成果: Conference contribution

8 被引用数 (Scopus)

抄録

Motion estimation (ME) requires huge computation complexity. Many motion estimation algorithms have been proposed to reduce its complexity. But they are still insufficient for embedded video coding systems. So we proposed an ultralow complexity ME algorithm that is suitable for the software implementation. The simulation results show that proposed algorithm has about 1,000 times the speedup than full search (FS) maintaining high image quality. And we also propose an application specific instruction-set processor (ASIP) for ME. It is based on a reduced instruction set computer (RISC) with sum of absolute difference (SAD) operation circuit. Our ME ASIP is implemented on FPGA. It is required about 3,313 logic elements (LEs) and its hardware scale is about quarter of the previous ME ASIP. This ME ASIP will make a significant contribution to the development of compact video coding systems.

本文言語English
ホスト出版物のタイトルISCAS 2006
ホスト出版物のサブタイトル2006 IEEE International Symposium on Circuits and Systems, Proceedings
ページ4691-4694
ページ数4
出版ステータスPublished - 2006
イベントISCAS 2006: 2006 IEEE International Symposium on Circuits and Systems - Kos, Greece
継続期間: 2006 5 212006 5 24

出版物シリーズ

名前Proceedings - IEEE International Symposium on Circuits and Systems
ISSN(印刷版)0271-4310

Conference

ConferenceISCAS 2006: 2006 IEEE International Symposium on Circuits and Systems
国/地域Greece
CityKos
Period06/5/2106/5/24

ASJC Scopus subject areas

  • 電子工学および電気工学

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