An ultra-low-voltage Class-C PMOS VCO IC with PVT compensation in 180-nm CMOS

Xin Yang, Xiao Xu, Toshihiko Yoshimasu

研究成果: Conference contribution

6 被引用数 (Scopus)

抄録

A novel 2.2-GHz-band ultra-low-voltage Class-C PMOS VCO IC with negative reference and amplitude feedback loop is proposed. The negative reference initially adapts a sufficient bias for the LC-VCO circuit to ensure a robust oscillation start-up. The feedback loop then adaptively controls the bias condition of LC-VCO for Class-C operation in steady-state. The reliability of the feedback loop is enhanced over PVT variation. The Class-C VCO IC has been designed, fabricated and fully evaluated in 180-nm CMOS technology. The fabricated VCO IC exhibits a measured phase noise of -113.2 dBc/Hz at 1 MHz offset from the 2.2 GHz carrier frequency with a supply voltage of only 0.3 V.

本文言語English
ホスト出版物のタイトルSiRF 2016 - 2016 IEEE 16th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems
出版社Institute of Electrical and Electronics Engineers Inc.
ページ107-109
ページ数3
ISBN(電子版)9781509016877
DOI
出版ステータスPublished - 2016 3 31
イベント16th IEEE Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, SiRF 2016 - Austin, United States
継続期間: 2016 1 242016 1 27

出版物シリーズ

名前SiRF 2016 - 2016 IEEE 16th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems

Other

Other16th IEEE Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, SiRF 2016
CountryUnited States
CityAustin
Period16/1/2416/1/27

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Electronic, Optical and Magnetic Materials
  • Computer Networks and Communications

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